1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2011 Freescale Semiconductor, Inc.
4 * Jason Liu <r64343@freescale.com>
6 * Configuration settings for Freescale MX53 low cost board.
12 #include <asm/arch/imx-regs.h>
14 #define CONSOLE_DEV "ttymxc0"
16 #define CONFIG_CMDLINE_TAG
17 #define CONFIG_SETUP_MEMORY_TAGS
18 #define CONFIG_INITRD_TAG
20 #define CONFIG_SYS_FSL_CLK
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
25 #define CONFIG_BOARD_LATE_INIT
26 #define CONFIG_REVISION_TAG
28 #define CONFIG_MXC_UART
29 #define CONFIG_MXC_UART_BASE UART1_BASE
33 #define CONFIG_FEC_MXC
34 #define IMX_FEC_BASE FEC_BASE_ADDR
35 #define CONFIG_FEC_MXC_PHYADDR 0x1F
38 #define CONFIG_USB_HOST_ETHER
39 #define CONFIG_USB_ETHER_ASIX
40 #define CONFIG_USB_ETHER_MCS7830
41 #define CONFIG_USB_ETHER_SMSC95XX
42 #define CONFIG_MXC_USB_PORT 1
43 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
44 #define CONFIG_MXC_USB_FLAGS 0
46 /* allow to overwrite serial and ethaddr */
47 #define CONFIG_ENV_OVERWRITE
48 #define CONFIG_BAUDRATE 115200
50 /* Command definition */
52 #define CONFIG_ETHPRIME "FEC0"
54 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
56 #define PPD_CONFIG_NFS \
57 "nfsserver=192.168.252.95\0" \
58 "gatewayip=192.168.252.95\0" \
59 "netmask=255.255.255.0\0" \
60 "ipaddr=192.168.252.99\0" \
63 "nfsroot=/opt/springdale/rd\0" \
64 "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \
65 "${kern_ipconf} nfsroot=${nfsserver}:${nfsroot},v3,tcp rw\0" \
66 "choose_ip=if test $use_dhcp = 1; then setenv kern_ipconf ip=dhcp; " \
67 "setenv getcmd dhcp; else setenv kern_ipconf " \
68 "ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off; " \
69 "setenv getcmd tftp; fi\0" \
70 "nfs=run choose_ip setargs bootargs_nfs; ${getcmd} ${loadaddr} " \
71 "${nfsserver}:${image}; bootm ${loadaddr}\0" \
73 #define CONFIG_EXTRA_ENV_SETTINGS \
75 "image=/boot/fitImage\0" \
76 "fdt_high=0xffffffff\0" \
79 "rootdev=mmcblk0p\0" \
80 "quiet=quiet loglevel=0\0" \
81 "console=" CONSOLE_DEV "\0" \
83 "setargs=setenv bootargs ${lvds} jtag=on mem=2G " \
84 "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \
85 "console=${console}\0" \
86 "bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \
87 "rootwait ${bootargs}\0" \
88 "doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \
89 "then setenv quiet; fi\0" \
90 "hasfirstboot=ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \
91 "/boot/bootcause/firstboot\0" \
92 "swappartitions=setexpr partnum 3 - ${partnum}\0" \
96 "lcdputs \"Monitor failed to start. " \
97 "Try again, or contact GE Service for support.\"; " \
98 "bootcount reset; \0" \
101 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
102 "run hasfirstboot || setenv partnum 0; " \
103 "if test ${partnum} != 0; then " \
104 "setenv bootcause REVERT; " \
105 "run swappartitions loadimage doboot; " \
107 "run failbootcmd\0" \
109 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
111 "echo Booting from ${dev}:${devnum}:${partnum} ...; " \
113 "run bootargs_emmc; " \
114 "bootm ${loadaddr}\0" \
116 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
117 "run loadimage || run swappartitions && run loadimage || " \
118 "setenv partnum 0 && echo MISSING IMAGE;" \
120 "run failbootcmd\0" \
122 "lcd:800x480-24@60,monitor=lcd\0" \
124 #define CONFIG_MMCBOOTCOMMAND \
125 "if mmc dev ${devnum}; then " \
130 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
132 #define CONFIG_ARP_TIMEOUT 200UL
134 /* Miscellaneous configurable options */
135 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
137 #define CONFIG_SYS_MAXARGS 48 /* max number of command args */
138 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
140 #define CONFIG_SYS_MEMTEST_START 0x70000000
141 #define CONFIG_SYS_MEMTEST_END 0x70010000
143 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
145 /* Physical Memory Map */
146 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
147 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
148 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
149 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
150 #define PHYS_SDRAM_SIZE (gd->ram_size)
152 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
153 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
154 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
156 #define CONFIG_SYS_INIT_SP_OFFSET \
157 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
158 #define CONFIG_SYS_INIT_SP_ADDR \
159 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
161 /* FLASH and environment organization */
162 #define CONFIG_SYS_MMC_ENV_DEV 0
164 #define CONFIG_CMD_FUSE
165 #define CONFIG_FSL_IIM
169 /* Backlight Control */
170 #define CONFIG_IMX6_PWM_PER_CLK 66666000
172 #define CONFIG_IMX_VIDEO_SKIP
174 #endif /* __CONFIG_H */