Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
[platform/kernel/u-boot.git] / include / configs / mx53ppd.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2011 Freescale Semiconductor, Inc.
4  * Jason Liu <r64343@freescale.com>
5  *
6  * Configuration settings for Freescale MX53 low cost board.
7  */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 #include <asm/arch/imx-regs.h>
13
14 #define CONSOLE_DEV     "ttymxc0"
15
16 #define CONFIG_CMDLINE_TAG
17 #define CONFIG_SETUP_MEMORY_TAGS
18 #define CONFIG_INITRD_TAG
19
20 #define CONFIG_SYS_FSL_CLK
21
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
24
25 #define CONFIG_BOARD_LATE_INIT
26 #define CONFIG_REVISION_TAG
27
28 #define CONFIG_MXC_UART
29 #define CONFIG_MXC_UART_BASE    UART1_BASE
30
31 /* Eth Configs */
32
33 #define CONFIG_FEC_MXC
34 #define IMX_FEC_BASE    FEC_BASE_ADDR
35 #define CONFIG_FEC_MXC_PHYADDR  0x1F
36
37 /* USB Configs */
38 #define CONFIG_USB_HOST_ETHER
39 #define CONFIG_USB_ETHER_ASIX
40 #define CONFIG_USB_ETHER_MCS7830
41 #define CONFIG_USB_ETHER_SMSC95XX
42 #define CONFIG_MXC_USB_PORT     1
43 #define CONFIG_MXC_USB_PORTSC   (PORT_PTS_UTMI | PORT_PTS_PTW)
44 #define CONFIG_MXC_USB_FLAGS    0
45
46 #define CONFIG_SYS_RTC_BUS_NUM          2
47 #define CONFIG_SYS_I2C_RTC_ADDR 0x30
48
49 /* I2C Configs */
50 #define CONFIG_SYS_I2C
51 #define CONFIG_SYS_I2C_MXC
52 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
53 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
54 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
55
56 /* PMIC Controller */
57 #define CONFIG_POWER
58 #define CONFIG_POWER_I2C
59 #define CONFIG_DIALOG_POWER
60 #define CONFIG_POWER_FSL
61 #define CONFIG_POWER_FSL_MC13892
62 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
63 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR    0x8
64
65 /* allow to overwrite serial and ethaddr */
66 #define CONFIG_ENV_OVERWRITE
67 #define CONFIG_BAUDRATE                 115200
68
69 /* Command definition */
70
71 #define CONFIG_ETHPRIME         "FEC0"
72
73 #define CONFIG_LOADADDR         0x72000000      /* loadaddr env var */
74
75 #define PPD_CONFIG_NFS \
76         "nfsserver=192.168.252.95\0" \
77         "gatewayip=192.168.252.95\0" \
78         "netmask=255.255.255.0\0" \
79         "ipaddr=192.168.252.99\0" \
80         "kernsize=0x2000\0" \
81         "use_dhcp=0\0" \
82         "nfsroot=/opt/springdale/rd\0" \
83         "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \
84                 "${kern_ipconf} nfsroot=${nfsserver}:${nfsroot},v3,tcp rw\0" \
85         "choose_ip=if test $use_dhcp = 1; then setenv kern_ipconf ip=dhcp; " \
86                 "setenv getcmd dhcp; else setenv kern_ipconf " \
87                 "ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off; " \
88                 "setenv getcmd tftp; fi\0" \
89         "nfs=run choose_ip setargs bootargs_nfs; ${getcmd} ${loadaddr} " \
90                 "${nfsserver}:${image}; bootm ${loadaddr}\0" \
91
92 #define CONFIG_EXTRA_ENV_SETTINGS \
93         PPD_CONFIG_NFS \
94         "image=/boot/fitImage\0" \
95         "fdt_high=0xffffffff\0" \
96         "dev=mmc\0" \
97         "devnum=2\0" \
98         "rootdev=mmcblk0p\0" \
99         "quiet=quiet loglevel=0\0" \
100         "console=" CONSOLE_DEV "\0" \
101         "lvds=ldb\0" \
102         "setargs=setenv bootargs ${lvds} jtag=on mem=2G " \
103                 "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \
104                 "console=${console} ${rtc_status}\0" \
105         "bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \
106                 "rootwait ${bootargs}\0" \
107         "doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \
108                 "then setenv quiet; fi\0" \
109         "hasfirstboot=ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \
110                 "/boot/bootcause/firstboot\0" \
111         "swappartitions=setexpr partnum 3 - ${partnum}\0" \
112         "failbootcmd=" \
113                 "ppd_lcd_enable; " \
114                 "msg=\"Monitor failed to start.  " \
115                         "Try again, or contact GE Service for support.\"; " \
116                 "echo $msg; " \
117                 "setenv stdout vga; " \
118                 "echo \"\n\n\n\n    \" $msg; " \
119                 "setenv stdout serial; " \
120                 "mw.b 0x7000A000 0xbc; " \
121                 "mw.b 0x7000A001 0x00; " \
122                 "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \
123         "altbootcmd=" \
124                 "run doquiet; " \
125                 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
126                 "run hasfirstboot || setenv partnum 0; " \
127                 "if test ${partnum} != 0; then " \
128                         "setenv bootcause REVERT; " \
129                         "run swappartitions loadimage doboot; " \
130                 "fi; " \
131                 "run failbootcmd\0" \
132         "loadimage=" \
133                 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
134         "doboot=" \
135                 "echo Booting from ${dev}:${devnum}:${partnum} ...; " \
136                 "run setargs; " \
137                 "run bootargs_emmc; " \
138                 "bootm ${loadaddr}\0" \
139         "tryboot=" \
140                 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
141                 "run loadimage || run swappartitions && run loadimage || " \
142                         "setenv partnum 0 && echo MISSING IMAGE;" \
143                 "run doboot; " \
144                 "run failbootcmd\0" \
145         "video-mode=" \
146                 "lcd:800x480-24@60,monitor=lcd\0" \
147
148 #define CONFIG_MMCBOOTCOMMAND \
149         "if mmc dev ${devnum}; then " \
150                 "run doquiet; " \
151                 "run tryboot; " \
152         "fi; " \
153
154 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
155
156 #define CONFIG_ARP_TIMEOUT      200UL
157
158 /* Miscellaneous configurable options */
159 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
160
161 #define CONFIG_SYS_MAXARGS      48      /* max number of command args */
162 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
163
164 #define CONFIG_SYS_MEMTEST_START       0x70000000
165 #define CONFIG_SYS_MEMTEST_END         0x70010000
166
167 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
168
169 /* Physical Memory Map */
170 #define PHYS_SDRAM_1                    CSD0_BASE_ADDR
171 #define PHYS_SDRAM_1_SIZE               (gd->bd->bi_dram[0].size)
172 #define PHYS_SDRAM_2                    CSD1_BASE_ADDR
173 #define PHYS_SDRAM_2_SIZE               (gd->bd->bi_dram[1].size)
174 #define PHYS_SDRAM_SIZE                 (gd->ram_size)
175
176 #define CONFIG_SYS_SDRAM_BASE           (PHYS_SDRAM_1)
177 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR)
178 #define CONFIG_SYS_INIT_RAM_SIZE        (IRAM_SIZE)
179
180 #define CONFIG_SYS_INIT_SP_OFFSET \
181         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
182 #define CONFIG_SYS_INIT_SP_ADDR \
183         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
184
185 /* FLASH and environment organization */
186 #define CONFIG_ENV_OFFSET      (12 * 64 * 1024)
187 #define CONFIG_ENV_SIZE        (10 * 1024)
188 #define CONFIG_SYS_MMC_ENV_DEV 0
189
190 #define CONFIG_CMD_FUSE
191 #define CONFIG_FSL_IIM
192
193 #define CONFIG_SYS_I2C_SPEED    100000
194
195 /* I2C1 */
196 #define CONFIG_SYS_NUM_I2C_BUSES        9
197 #define CONFIG_SYS_I2C_MAX_HOPS         1
198 #define CONFIG_SYS_I2C_BUSES    {       {0, {I2C_NULL_HOP} }, \
199                                         {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
200                                         {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
201                                         {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
202                                         {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
203                                         {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
204                                         {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
205                                         {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
206                                         {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
207                                 }
208
209 #define CONFIG_BCH
210
211 /* Backlight Control */
212 #define CONFIG_IMX6_PWM_PER_CLK 66666000
213
214 #endif                          /* __CONFIG_H */