include/configs/mx53ppd.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2011 Freescale Semiconductor, Inc.
   4  * Jason Liu <r64343@freescale.com>
   5  *
   6  * Configuration settings for Freescale MX53 low cost board.
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #include <asm/arch/imx-regs.h>
  13
  14 #define CONSOLE_DEV     "ttymxc0"
  15
  16 #define CONFIG_CMDLINE_TAG
  17 #define CONFIG_SETUP_MEMORY_TAGS
  18 #define CONFIG_INITRD_TAG
  19
  20 #define CONFIG_SYS_FSL_CLK
  21
  22 /* Size of malloc() pool */
  23 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
  24
  25 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000
  26
  27 #define CONFIG_BOARD_LATE_INIT
  28 #define CONFIG_REVISION_TAG
  29
  30 #define CONFIG_MXC_UART
  31 #define CONFIG_MXC_UART_BASE    UART1_BASE
  32
  33 /* Eth Configs */
  34
  35 #define CONFIG_FEC_MXC
  36 #define IMX_FEC_BASE    FEC_BASE_ADDR
  37 #define CONFIG_FEC_MXC_PHYADDR  0x1F
  38
  39 /* USB Configs */
  40 #define CONFIG_USB_EHCI_MX5
  41 #define CONFIG_USB_HOST_ETHER
  42 #define CONFIG_USB_ETHER_ASIX
  43 #define CONFIG_USB_ETHER_MCS7830
  44 #define CONFIG_USB_ETHER_SMSC95XX
  45 #define CONFIG_MXC_USB_PORT     1
  46 #define CONFIG_MXC_USB_PORTSC   (PORT_PTS_UTMI | PORT_PTS_PTW)
  47 #define CONFIG_MXC_USB_FLAGS    0
  48
  49 #define CONFIG_SYS_RTC_BUS_NUM          2
  50 #define CONFIG_SYS_I2C_RTC_ADDR 0x30
  51
  52 /* I2C Configs */
  53 #define CONFIG_SYS_I2C
  54 #define CONFIG_SYS_I2C_MXC
  55 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
  56 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
  57 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
  58
  59 /* PMIC Controller */
  60 #define CONFIG_POWER
  61 #define CONFIG_POWER_I2C
  62 #define CONFIG_DIALOG_POWER
  63 #define CONFIG_POWER_FSL
  64 #define CONFIG_POWER_FSL_MC13892
  65 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
  66 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR    0x8
  67
  68 /* allow to overwrite serial and ethaddr */
  69 #define CONFIG_ENV_OVERWRITE
  70 #define CONFIG_BAUDRATE                 115200
  71
  72 /* Command definition */
  73
  74 #define CONFIG_ETHPRIME         "FEC0"
  75
  76 #define CONFIG_LOADADDR         0x72000000      /* loadaddr env var */
  77
  78 #define PPD_CONFIG_NFS \
  79         "nfsserver=192.168.252.95\0" \
  80         "gatewayip=192.168.252.95\0" \
  81         "netmask=255.255.255.0\0" \
  82         "ipaddr=192.168.252.99\0" \
  83         "kernsize=0x2000\0" \
  84         "use_dhcp=0\0" \
  85         "nfsroot=/opt/springdale/rd\0" \
  86         "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \
  87                 "${kern_ipconf} nfsroot=${nfsserver}:${nfsroot},v3,tcp rw\0" \
  88         "choose_ip=if test $use_dhcp = 1; then setenv kern_ipconf ip=dhcp; " \
  89                 "setenv getcmd dhcp; else setenv kern_ipconf " \
  90                 "ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off; " \
  91                 "setenv getcmd tftp; fi\0" \
  92         "nfs=run choose_ip setargs bootargs_nfs; ${getcmd} ${loadaddr} " \
  93                 "${nfsserver}:${image}; bootm ${loadaddr}\0" \
  94
  95 #define CONFIG_EXTRA_ENV_SETTINGS \
  96         PPD_CONFIG_NFS \
  97         "image=/boot/fitImage\0" \
  98         "fdt_high=0xffffffff\0" \
  99         "dev=mmc\0" \
 100         "devnum=2\0" \
 101         "rootdev=mmcblk0p\0" \
 102         "quiet=quiet loglevel=0\0" \
 103         "console=" CONSOLE_DEV "\0" \
 104         "lvds=ldb\0" \
 105         "setargs=setenv bootargs ${lvds} jtag=on mem=2G " \
 106                 "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \
 107                 "console=${console} ${rtc_status}\0" \
 108         "bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \
 109                 "rootwait ${bootargs}\0" \
 110         "doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \
 111                 "then setenv quiet; fi\0" \
 112         "hasfirstboot=ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \
 113                 "/boot/bootcause/firstboot\0" \
 114         "swappartitions=setexpr partnum 3 - ${partnum}\0" \
 115         "failbootcmd=" \
 116                 "ppd_lcd_enable; " \
 117                 "msg=\"Monitor failed to start.  " \
 118                         "Try again, or contact GE Service for support.\"; " \
 119                 "echo $msg; " \
 120                 "setenv stdout vga; " \
 121                 "echo \"\n\n\n\n    \" $msg; " \
 122                 "setenv stdout serial; " \
 123                 "mw.b 0x7000A000 0xbc; " \
 124                 "mw.b 0x7000A001 0x00; " \
 125                 "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \
 126         "altbootcmd=" \
 127                 "run doquiet; " \
 128                 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
 129                 "run hasfirstboot || setenv partnum 0; " \
 130                 "if test ${partnum} != 0; then " \
 131                         "setenv bootcause REVERT; " \
 132                         "run swappartitions loadimage doboot; " \
 133                 "fi; " \
 134                 "run failbootcmd\0" \
 135         "loadimage=" \
 136                 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
 137         "doboot=" \
 138                 "echo Booting from ${dev}:${devnum}:${partnum} ...; " \
 139                 "run setargs; " \
 140                 "run bootargs_emmc; " \
 141                 "bootm ${loadaddr}\0" \
 142         "tryboot=" \
 143                 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
 144                 "run loadimage || run swappartitions && run loadimage || " \
 145                         "setenv partnum 0 && echo MISSING IMAGE;" \
 146                 "run doboot; " \
 147                 "run failbootcmd\0" \
 148         "video-mode=" \
 149                 "lcd:800x480-24@60,monitor=lcd\0" \
 150
 151 #define CONFIG_MMCBOOTCOMMAND \
 152         "if mmc dev ${devnum}; then " \
 153                 "run doquiet; " \
 154                 "run tryboot; " \
 155         "fi; " \
 156
 157 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
 158
 159 #define CONFIG_ARP_TIMEOUT      200UL
 160
 161 /* Miscellaneous configurable options */
 162 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
 163
 164 #define CONFIG_SYS_MAXARGS      48      /* max number of command args */
 165 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
 166
 167 #define CONFIG_SYS_MEMTEST_START       0x70000000
 168 #define CONFIG_SYS_MEMTEST_END         0x70010000
 169
 170 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 171
 172 /* Physical Memory Map */
 173 #define PHYS_SDRAM_1                    CSD0_BASE_ADDR
 174 #define PHYS_SDRAM_1_SIZE               (gd->bd->bi_dram[0].size)
 175 #define PHYS_SDRAM_2                    CSD1_BASE_ADDR
 176 #define PHYS_SDRAM_2_SIZE               (gd->bd->bi_dram[1].size)
 177 #define PHYS_SDRAM_SIZE                 (gd->ram_size)
 178
 179 #define CONFIG_SYS_SDRAM_BASE           (PHYS_SDRAM_1)
 180 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR)
 181 #define CONFIG_SYS_INIT_RAM_SIZE        (IRAM_SIZE)
 182
 183 #define CONFIG_SYS_INIT_SP_OFFSET \
 184         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 185 #define CONFIG_SYS_INIT_SP_ADDR \
 186         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 187
 188 /* FLASH and environment organization */
 189 #define CONFIG_ENV_OFFSET      (12 * 64 * 1024)
 190 #define CONFIG_ENV_SIZE        (10 * 1024)
 191 #define CONFIG_SYS_MMC_ENV_DEV 0
 192
 193 #define CONFIG_CMD_FUSE
 194 #define CONFIG_FSL_IIM
 195
 196 #define CONFIG_SYS_I2C_SPEED    100000
 197
 198 /* I2C1 */
 199 #define CONFIG_SYS_NUM_I2C_BUSES        9
 200 #define CONFIG_SYS_I2C_MAX_HOPS         1
 201 #define CONFIG_SYS_I2C_BUSES    {       {0, {I2C_NULL_HOP} }, \
 202                                         {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
 203                                         {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
 204                                         {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
 205                                         {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
 206                                         {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
 207                                         {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
 208                                         {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
 209                                         {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
 210                                 }
 211
 212 #define CONFIG_BCH
 213
 214 /* Backlight Control */
 215 #define CONFIG_PWM_IMX
 216 #define CONFIG_IMX6_PWM_PER_CLK 66666000
 217
 218 #endif                          /* __CONFIG_H */