include/configs/mx53ppd.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2011 Freescale Semiconductor, Inc.
   4  * Jason Liu <r64343@freescale.com>
   5  *
   6  * Configuration settings for Freescale MX53 low cost board.
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #include <asm/arch/imx-regs.h>
  13
  14 #define CONSOLE_DEV     "ttymxc0"
  15
  16 #define CONFIG_CMDLINE_TAG
  17 #define CONFIG_SETUP_MEMORY_TAGS
  18 #define CONFIG_INITRD_TAG
  19
  20 #define CONFIG_SYS_FSL_CLK
  21
  22 /* Size of malloc() pool */
  23 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
  24
  25 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000
  26
  27 #define CONFIG_BOARD_LATE_INIT
  28 #define CONFIG_REVISION_TAG
  29
  30 #define CONFIG_MXC_UART
  31 #define CONFIG_MXC_UART_BASE    UART1_BASE
  32
  33 /* Eth Configs */
  34
  35 #define CONFIG_FEC_MXC
  36 #define IMX_FEC_BASE    FEC_BASE_ADDR
  37 #define CONFIG_FEC_MXC_PHYADDR  0x1F
  38
  39 /* USB Configs */
  40 #define CONFIG_USB_HOST_ETHER
  41 #define CONFIG_USB_ETHER_ASIX
  42 #define CONFIG_USB_ETHER_MCS7830
  43 #define CONFIG_USB_ETHER_SMSC95XX
  44 #define CONFIG_MXC_USB_PORT     1
  45 #define CONFIG_MXC_USB_PORTSC   (PORT_PTS_UTMI | PORT_PTS_PTW)
  46 #define CONFIG_MXC_USB_FLAGS    0
  47
  48 #define CONFIG_SYS_RTC_BUS_NUM          2
  49 #define CONFIG_SYS_I2C_RTC_ADDR 0x30
  50
  51 /* I2C Configs */
  52 #define CONFIG_SYS_I2C
  53 #define CONFIG_SYS_I2C_MXC
  54 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
  55 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
  56 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
  57
  58 /* PMIC Controller */
  59 #define CONFIG_POWER
  60 #define CONFIG_POWER_I2C
  61 #define CONFIG_DIALOG_POWER
  62 #define CONFIG_POWER_FSL
  63 #define CONFIG_POWER_FSL_MC13892
  64 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
  65 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR    0x8
  66
  67 /* allow to overwrite serial and ethaddr */
  68 #define CONFIG_ENV_OVERWRITE
  69 #define CONFIG_BAUDRATE                 115200
  70
  71 /* Command definition */
  72
  73 #define CONFIG_ETHPRIME         "FEC0"
  74
  75 #define CONFIG_LOADADDR         0x72000000      /* loadaddr env var */
  76
  77 #define PPD_CONFIG_NFS \
  78         "nfsserver=192.168.252.95\0" \
  79         "gatewayip=192.168.252.95\0" \
  80         "netmask=255.255.255.0\0" \
  81         "ipaddr=192.168.252.99\0" \
  82         "kernsize=0x2000\0" \
  83         "use_dhcp=0\0" \
  84         "nfsroot=/opt/springdale/rd\0" \
  85         "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \
  86                 "${kern_ipconf} nfsroot=${nfsserver}:${nfsroot},v3,tcp rw\0" \
  87         "choose_ip=if test $use_dhcp = 1; then setenv kern_ipconf ip=dhcp; " \
  88                 "setenv getcmd dhcp; else setenv kern_ipconf " \
  89                 "ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off; " \
  90                 "setenv getcmd tftp; fi\0" \
  91         "nfs=run choose_ip setargs bootargs_nfs; ${getcmd} ${loadaddr} " \
  92                 "${nfsserver}:${image}; bootm ${loadaddr}\0" \
  93
  94 #define CONFIG_EXTRA_ENV_SETTINGS \
  95         PPD_CONFIG_NFS \
  96         "image=/boot/fitImage\0" \
  97         "fdt_high=0xffffffff\0" \
  98         "dev=mmc\0" \
  99         "devnum=2\0" \
 100         "rootdev=mmcblk0p\0" \
 101         "quiet=quiet loglevel=0\0" \
 102         "console=" CONSOLE_DEV "\0" \
 103         "lvds=ldb\0" \
 104         "setargs=setenv bootargs ${lvds} jtag=on mem=2G " \
 105                 "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \
 106                 "console=${console} ${rtc_status}\0" \
 107         "bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \
 108                 "rootwait ${bootargs}\0" \
 109         "doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \
 110                 "then setenv quiet; fi\0" \
 111         "hasfirstboot=ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \
 112                 "/boot/bootcause/firstboot\0" \
 113         "swappartitions=setexpr partnum 3 - ${partnum}\0" \
 114         "failbootcmd=" \
 115                 "ppd_lcd_enable; " \
 116                 "msg=\"Monitor failed to start.  " \
 117                         "Try again, or contact GE Service for support.\"; " \
 118                 "echo $msg; " \
 119                 "setenv stdout vga; " \
 120                 "echo \"\n\n\n\n    \" $msg; " \
 121                 "setenv stdout serial; " \
 122                 "mw.b 0x7000A000 0xbc; " \
 123                 "mw.b 0x7000A001 0x00; " \
 124                 "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \
 125         "altbootcmd=" \
 126                 "run doquiet; " \
 127                 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
 128                 "run hasfirstboot || setenv partnum 0; " \
 129                 "if test ${partnum} != 0; then " \
 130                         "setenv bootcause REVERT; " \
 131                         "run swappartitions loadimage doboot; " \
 132                 "fi; " \
 133                 "run failbootcmd\0" \
 134         "loadimage=" \
 135                 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
 136         "doboot=" \
 137                 "echo Booting from ${dev}:${devnum}:${partnum} ...; " \
 138                 "run setargs; " \
 139                 "run bootargs_emmc; " \
 140                 "bootm ${loadaddr}\0" \
 141         "tryboot=" \
 142                 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
 143                 "run loadimage || run swappartitions && run loadimage || " \
 144                         "setenv partnum 0 && echo MISSING IMAGE;" \
 145                 "run doboot; " \
 146                 "run failbootcmd\0" \
 147         "video-mode=" \
 148                 "lcd:800x480-24@60,monitor=lcd\0" \
 149
 150 #define CONFIG_MMCBOOTCOMMAND \
 151         "if mmc dev ${devnum}; then " \
 152                 "run doquiet; " \
 153                 "run tryboot; " \
 154         "fi; " \
 155
 156 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
 157
 158 #define CONFIG_ARP_TIMEOUT      200UL
 159
 160 /* Miscellaneous configurable options */
 161 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
 162
 163 #define CONFIG_SYS_MAXARGS      48      /* max number of command args */
 164 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
 165
 166 #define CONFIG_SYS_MEMTEST_START       0x70000000
 167 #define CONFIG_SYS_MEMTEST_END         0x70010000
 168
 169 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 170
 171 /* Physical Memory Map */
 172 #define PHYS_SDRAM_1                    CSD0_BASE_ADDR
 173 #define PHYS_SDRAM_1_SIZE               (gd->bd->bi_dram[0].size)
 174 #define PHYS_SDRAM_2                    CSD1_BASE_ADDR
 175 #define PHYS_SDRAM_2_SIZE               (gd->bd->bi_dram[1].size)
 176 #define PHYS_SDRAM_SIZE                 (gd->ram_size)
 177
 178 #define CONFIG_SYS_SDRAM_BASE           (PHYS_SDRAM_1)
 179 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR)
 180 #define CONFIG_SYS_INIT_RAM_SIZE        (IRAM_SIZE)
 181
 182 #define CONFIG_SYS_INIT_SP_OFFSET \
 183         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 184 #define CONFIG_SYS_INIT_SP_ADDR \
 185         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 186
 187 /* FLASH and environment organization */
 188 #define CONFIG_ENV_OFFSET      (12 * 64 * 1024)
 189 #define CONFIG_ENV_SIZE        (10 * 1024)
 190 #define CONFIG_SYS_MMC_ENV_DEV 0
 191
 192 #define CONFIG_CMD_FUSE
 193 #define CONFIG_FSL_IIM
 194
 195 #define CONFIG_SYS_I2C_SPEED    100000
 196
 197 /* I2C1 */
 198 #define CONFIG_SYS_NUM_I2C_BUSES        9
 199 #define CONFIG_SYS_I2C_MAX_HOPS         1
 200 #define CONFIG_SYS_I2C_BUSES    {       {0, {I2C_NULL_HOP} }, \
 201                                         {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
 202                                         {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
 203                                         {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
 204                                         {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
 205                                         {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
 206                                         {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
 207                                         {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
 208                                         {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
 209                                 }
 210
 211 #define CONFIG_BCH
 212
 213 /* Backlight Control */
 214 #define CONFIG_PWM_IMX
 215 #define CONFIG_IMX6_PWM_PER_CLK 66666000
 216
 217 #endif                          /* __CONFIG_H */