1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2011 Freescale Semiconductor, Inc.
4 * Jason Liu <r64343@freescale.com>
6 * Configuration settings for Freescale MX53 low cost board.
12 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO
14 #include <asm/arch/imx-regs.h>
16 #define CONFIG_CMDLINE_TAG
17 #define CONFIG_SETUP_MEMORY_TAGS
18 #define CONFIG_INITRD_TAG
20 #define CONFIG_SYS_FSL_CLK
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
25 #define CONFIG_REVISION_TAG
27 #define CONFIG_MXC_UART_BASE UART1_BASE
30 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
31 #define CONFIG_SYS_FSL_ESDHC_NUM 2
35 #define CONFIG_FEC_MXC
36 #define IMX_FEC_BASE FEC_BASE_ADDR
37 #define CONFIG_FEC_MXC_PHYADDR 0x1F
40 #define CONFIG_MXC_USB_PORT 1
41 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
42 #define CONFIG_MXC_USB_FLAGS 0
45 #define CONFIG_SYS_I2C
46 #define CONFIG_SYS_I2C_MXC
47 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
48 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
49 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
53 #define CONFIG_POWER_I2C
54 #define CONFIG_DIALOG_POWER
55 #define CONFIG_POWER_FSL
56 #define CONFIG_POWER_FSL_MC13892
57 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
58 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
60 /* Command definition */
63 #define CONFIG_ETHPRIME "FEC0"
65 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
67 #define CONFIG_EXTRA_ENV_SETTINGS \
70 "fdt_addr=0x71000000\0" \
75 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
76 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \
78 "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
79 "bootscript=echo Running bootscript from mmc ...; " \
81 "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
82 "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
83 "mmcboot=echo Booting from mmc ...; " \
85 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
86 "if run loadfdt; then " \
87 "bootz ${loadaddr} - ${fdt_addr}; " \
89 "if test ${boot_fdt} = try; then " \
92 "echo WARN: Cannot load the DT; " \
98 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
100 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
101 "netboot=echo Booting from net ...; " \
103 "if test ${ip_dyn} = yes; then " \
104 "setenv get_cmd dhcp; " \
106 "setenv get_cmd tftp; " \
108 "${get_cmd} ${image}; " \
109 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
110 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
111 "bootz ${loadaddr} - ${fdt_addr}; " \
113 "if test ${boot_fdt} = try; then " \
116 "echo ERROR: Cannot load the DT; " \
124 #define CONFIG_BOOTCOMMAND \
125 "mmc dev ${mmcdev}; if mmc rescan; then " \
126 "if run loadbootscript; then " \
129 "if run loadimage; then " \
131 "else run netboot; " \
134 "else run netboot; fi"
136 #define CONFIG_ARP_TIMEOUT 200UL
138 /* Miscellaneous configurable options */
139 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
141 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
143 /* Physical Memory Map */
144 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
145 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
146 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
147 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
148 #define PHYS_SDRAM_SIZE (gd->ram_size)
150 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
151 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
152 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
154 #define CONFIG_SYS_INIT_SP_OFFSET \
155 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
156 #define CONFIG_SYS_INIT_SP_ADDR \
157 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
159 /* Environment starts at 768k = 768 * 1024 = 786432 */
161 * Detect overlap between U-Boot image and environment area in build-time
163 * CONFIG_BOARD_SIZE_LIMIT = CONFIG_ENV_OFFSET - u-boot.imx offset
164 * CONFIG_BOARD_SIZE_LIMIT = 768k - 1k = 767k = 785408
166 * Currently CONFIG_BOARD_SIZE_LIMIT does not handle expressions, so
167 * write the direct value here
169 #define CONFIG_BOARD_SIZE_LIMIT 785408
171 #ifdef CONFIG_CMD_SATA
172 #define CONFIG_SYS_SATA_MAX_DEVICE 1
173 #define CONFIG_DWC_AHSATA_PORT_ID 0
174 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
178 /* Framebuffer and LCD */
179 #define CONFIG_VIDEO_LOGO
181 #endif /* __CONFIG_H */