2 * Copyright (C) 2010 Freescale Semiconductor, Inc.
4 * Configuration settings for the MX53-EVK Freescale board.
6 * SPDX-License-Identifier: GPL-2.0+
14 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK
16 #include <asm/arch/imx-regs.h>
18 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
19 #define CONFIG_SETUP_MEMORY_TAGS
20 #define CONFIG_INITRD_TAG
21 #define CONFIG_REVISION_TAG
23 #define CONFIG_SYS_FSL_CLK
25 /* Size of malloc() pool */
26 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
28 #define CONFIG_MXC_GPIO
30 #define CONFIG_MXC_UART
31 #define CONFIG_MXC_UART_BASE UART1_BASE
34 #define CONFIG_SYS_I2C
35 #define CONFIG_SYS_I2C_MXC
36 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
37 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
38 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
42 #define CONFIG_POWER_I2C
43 #define CONFIG_POWER_FSL
44 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8
45 #define CONFIG_POWER_FSL_MC13892
46 #define CONFIG_RTC_MC13XXX
49 #define CONFIG_FSL_ESDHC
50 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
51 #define CONFIG_SYS_FSL_ESDHC_NUM 2
56 #define CONFIG_FEC_MXC
57 #define IMX_FEC_BASE FEC_BASE_ADDR
58 #define CONFIG_FEC_MXC_PHYADDR 0x1F
60 #define CONFIG_CMD_DATE
62 /* Miscellaneous commands */
63 #define CONFIG_CMD_BMODE
65 /* allow to overwrite serial and ethaddr */
66 #define CONFIG_ENV_OVERWRITE
67 #define CONFIG_CONS_INDEX 1
68 #define CONFIG_BAUDRATE 115200
70 /* Command definition */
72 #define CONFIG_ETHPRIME "FEC0"
74 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
75 #define CONFIG_SYS_TEXT_BASE 0x77800000
77 #define CONFIG_EXTRA_ENV_SETTINGS \
82 "mmcroot=/dev/mmcblk0p3 rw\0" \
83 "mmcrootfstype=ext3 rootwait\0" \
84 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
86 "rootfstype=${mmcrootfstype}\0" \
88 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
89 "bootscript=echo Running bootscript from mmc ...; " \
91 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
92 "mmcboot=echo Booting from mmc ...; " \
95 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
97 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
98 "netboot=echo Booting from net ...; " \
100 "dhcp ${uimage}; bootm\0" \
102 #define CONFIG_BOOTCOMMAND \
103 "mmc dev ${mmcdev}; if mmc rescan; then " \
104 "if run loadbootscript; then " \
107 "if run loaduimage; then " \
109 "else run netboot; " \
112 "else run netboot; fi"
114 #define CONFIG_ARP_TIMEOUT 200UL
116 /* Miscellaneous configurable options */
117 #define CONFIG_SYS_LONGHELP /* undef to save memory */
118 #define CONFIG_AUTO_COMPLETE
119 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
121 /* Print Buffer Size */
122 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
123 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
124 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
126 #define CONFIG_SYS_MEMTEST_START 0x70000000
127 #define CONFIG_SYS_MEMTEST_END 0x70010000
129 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
131 #define CONFIG_CMDLINE_EDITING
133 /* Physical Memory Map */
134 #define CONFIG_NR_DRAM_BANKS 1
135 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
136 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
138 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
139 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
140 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
142 #define CONFIG_SYS_INIT_SP_OFFSET \
143 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
144 #define CONFIG_SYS_INIT_SP_ADDR \
145 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
147 /* FLASH and environment organization */
148 #define CONFIG_SYS_NO_FLASH
150 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
151 #define CONFIG_ENV_SIZE (8 * 1024)
152 #define CONFIG_ENV_IS_IN_MMC
153 #define CONFIG_SYS_MMC_ENV_DEV 0
155 #endif /* __CONFIG_H */