1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2010 Freescale Semiconductor, Inc.
5 * Configuration settings for the MX53-EVK Freescale board.
11 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK
13 #include <asm/arch/imx-regs.h>
15 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
16 #define CONFIG_SETUP_MEMORY_TAGS
17 #define CONFIG_INITRD_TAG
18 #define CONFIG_REVISION_TAG
20 #define CONFIG_SYS_FSL_CLK
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
25 #define CONFIG_MXC_UART
26 #define CONFIG_MXC_UART_BASE UART1_BASE
29 #define CONFIG_SYS_I2C
30 #define CONFIG_SYS_I2C_MXC
31 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
32 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
33 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
37 #define CONFIG_POWER_I2C
38 #define CONFIG_POWER_FSL
39 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8
40 #define CONFIG_POWER_FSL_MC13892
41 #define CONFIG_RTC_MC13XXX
44 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
45 #define CONFIG_SYS_FSL_ESDHC_NUM 2
49 #define CONFIG_FEC_MXC
50 #define IMX_FEC_BASE FEC_BASE_ADDR
51 #define CONFIG_FEC_MXC_PHYADDR 0x1F
53 /* allow to overwrite serial and ethaddr */
54 #define CONFIG_ENV_OVERWRITE
56 /* Command definition */
58 #define CONFIG_ETHPRIME "FEC0"
60 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
62 #define CONFIG_EXTRA_ENV_SETTINGS \
67 "mmcroot=/dev/mmcblk0p3 rw\0" \
68 "mmcrootfstype=ext3 rootwait\0" \
69 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
71 "rootfstype=${mmcrootfstype}\0" \
73 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
74 "bootscript=echo Running bootscript from mmc ...; " \
76 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
77 "mmcboot=echo Booting from mmc ...; " \
80 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
82 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
83 "netboot=echo Booting from net ...; " \
85 "dhcp ${uimage}; bootm\0" \
87 #define CONFIG_BOOTCOMMAND \
88 "mmc dev ${mmcdev}; if mmc rescan; then " \
89 "if run loadbootscript; then " \
92 "if run loaduimage; then " \
94 "else run netboot; " \
97 "else run netboot; fi"
99 #define CONFIG_ARP_TIMEOUT 200UL
101 /* Miscellaneous configurable options */
103 #define CONFIG_SYS_MEMTEST_START 0x70000000
104 #define CONFIG_SYS_MEMTEST_END 0x70010000
106 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
108 /* Physical Memory Map */
109 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
110 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
112 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
113 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
114 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
116 #define CONFIG_SYS_INIT_SP_OFFSET \
117 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
118 #define CONFIG_SYS_INIT_SP_ADDR \
119 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
121 /* environment organization */
122 #define CONFIG_SYS_MMC_ENV_DEV 0
124 #endif /* __CONFIG_H */