2 * Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG
3 * Patrick Bruenn <p.bruenn@beckhoff.com>
5 * Configuration settings for Beckhoff CX9020.
7 * Based on Freescale's Linux i.MX mx53loco.h file:
8 * Copyright (C) 2010-2011 Freescale Semiconductor.
10 * SPDX-License-Identifier: GPL-2.0+
16 #include <asm/arch/imx-regs.h>
18 #define CONFIG_CMDLINE_TAG
19 #define CONFIG_SETUP_MEMORY_TAGS
20 #define CONFIG_INITRD_TAG
22 #define CONFIG_SYS_FSL_CLK
24 /* Size of malloc() pool */
25 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
27 #define CONFIG_REVISION_TAG
29 #define CONFIG_MXC_UART_BASE UART2_BASE
31 #define CONFIG_FPGA_COUNT 1
34 #define CONFIG_FSL_ESDHC
35 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
36 #define CONFIG_SYS_FSL_ESDHC_NUM 2
38 /* bootz: zImage/initrd.img support */
42 #define IMX_FEC_BASE FEC_BASE_ADDR
43 #define CONFIG_ETHPRIME "FEC0"
44 #define CONFIG_FEC_MXC_PHYADDR 0x1F
47 #define CONFIG_USB_EHCI_MX5
48 #define CONFIG_MXC_USB_PORT 1
49 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
50 #define CONFIG_MXC_USB_FLAGS 0
52 /* allow to overwrite serial and ethaddr */
53 #define CONFIG_ENV_OVERWRITE
54 #define CONFIG_CONS_INDEX 1
56 /* Command definition */
57 #define CONFIG_SUPPORT_RAW_INITRD
59 #define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */
60 #define CONFIG_SYS_TEXT_BASE 0x77800000
62 #define CONFIG_EXTRA_ENV_SETTINGS \
63 "fdt_addr_r=0x71ff0000\0" \
64 "pxefile_addr_r=0x73000000\0" \
65 "ramdisk_addr_r=0x72000000\0" \
66 "console=ttymxc1,115200\0" \
67 "uenv=/boot/uEnv.txt\0" \
72 "mmcrootfstype=ext4 rootwait fixrtc\0" \
73 "mmcargs=setenv bootargs console=${console} " \
75 "root=/dev/mmcblk${mmcdev}p${mmcpart} ro " \
76 "rootfstype=${mmcrootfstype} " \
78 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
79 "loadpxe=dhcp;setenv kernel_addr_r ${loadaddr};pxe get;pxe boot;\0" \
80 "loadrd=load mmc ${bootpart} ${ramdisk_addr_r} ${bootdir}/${rdfile};" \
81 "setenv rdsize ${filesize}\0" \
82 "loadfdt=echo loading ${fdt_path} ...;" \
83 "load mmc ${bootpart} ${fdt_addr_r} ${fdt_path}\0" \
84 "mmcboot=mmc dev ${mmcdev}; " \
85 "if mmc rescan; then " \
86 "echo SD/MMC found on device ${mmcdev};" \
87 "echo Checking for: ${uenv} ...;" \
88 "setenv bootpart ${mmcdev}:${mmcpart};" \
89 "if test -e mmc ${bootpart} ${uenv}; then " \
90 "load mmc ${bootpart} ${loadaddr} ${uenv};" \
91 "env import -t ${loadaddr} ${filesize};" \
92 "echo Loaded environment from ${uenv};" \
93 "if test -n ${dtb}; then " \
94 "setenv fdt_file ${dtb};" \
95 "echo Using: dtb=${fdt_file} ...;" \
97 "echo Checking for uname_r in ${uenv}...;" \
98 "if test -n ${uname_r}; then " \
99 "echo Running uname_boot ...;" \
105 "setenv bootdir /boot; " \
106 "setenv bootfile vmlinuz-${uname_r}; " \
107 "setenv ccatfile /boot/ccat.rbf; " \
108 "echo loading CCAT firmware from ${ccatfile}; " \
109 "load mmc ${bootpart} ${loadaddr} ${ccatfile}; " \
110 "fpga load 0 ${loadaddr} ${filesize}; " \
111 "if test -e mmc ${bootpart} ${bootdir}/${bootfile}; then " \
112 "echo loading ${bootdir}/${bootfile} ...; " \
114 "setenv fdt_path /boot/dtbs/${uname_r}/${fdt_file}; " \
115 "if test -e mmc ${bootpart} ${fdt_path}; then " \
118 "echo; echo unable to find ${fdt_file} ...;" \
119 "echo booting legacy ...;"\
121 "echo debug: [${bootargs}] ... ;" \
122 "echo debug: [bootz ${loadaddr}] ... ;" \
123 "bootz ${loadaddr}; " \
126 "echo debug: [${bootargs}] ... ;" \
127 "echo debug: [bootz ${loadaddr} - ${fdt_addr_r}];" \
128 "bootz ${loadaddr} - ${fdt_addr_r}; " \
130 "echo loading from dhcp ...; " \
134 #define CONFIG_BOOTCOMMAND \
137 #define CONFIG_ARP_TIMEOUT 200UL
139 /* Miscellaneous configurable options */
140 #define CONFIG_SYS_LONGHELP /* undef to save memory */
141 #define CONFIG_AUTO_COMPLETE
142 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
144 #define CONFIG_SYS_MEMTEST_START 0x70000000
145 #define CONFIG_SYS_MEMTEST_END 0x70010000
147 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
149 #define CONFIG_CMDLINE_EDITING
151 /* Physical Memory Map */
152 #define CONFIG_NR_DRAM_BANKS 2
153 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
154 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
155 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
156 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
157 #define PHYS_SDRAM_SIZE (gd->ram_size)
159 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
160 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
161 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
163 #define CONFIG_SYS_INIT_SP_OFFSET \
164 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
165 #define CONFIG_SYS_INIT_SP_ADDR \
166 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
168 /* environment organization */
169 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
170 #define CONFIG_ENV_SIZE (8 * 1024)
171 #define CONFIG_SYS_MMC_ENV_DEV 0
173 /* Framebuffer and LCD */
174 #define CONFIG_PREBOOT
175 #define CONFIG_VIDEO_IPUV3
176 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
177 #define CONFIG_VIDEO_BMP_RLE8
178 #define CONFIG_SPLASH_SCREEN
179 #define CONFIG_BMP_16BPP
180 #define CONFIG_VIDEO_LOGO
182 #endif /* __CONFIG_H */