1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG
4 * Patrick Bruenn <p.bruenn@beckhoff.com>
6 * Configuration settings for Beckhoff CX9020.
8 * Based on Freescale's Linux i.MX mx53loco.h file:
9 * Copyright (C) 2010-2011 Freescale Semiconductor.
15 #include <asm/arch/imx-regs.h>
17 #define CONFIG_MXC_UART_BASE UART2_BASE
19 #define CONFIG_FPGA_COUNT 1
22 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
23 #define CONFIG_SYS_FSL_ESDHC_NUM 2
25 /* bootz: zImage/initrd.img support */
29 #define CONFIG_MXC_USB_PORT 1
30 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
31 #define CONFIG_MXC_USB_FLAGS 0
33 /* Command definition */
35 #define BOOT_TARGET_DEVICES(func) \
41 #include <config_distro_bootcmd.h>
43 #define CONFIG_EXTRA_ENV_SETTINGS \
44 "fdt_addr_r=0x75000000\0" \
45 "pxefile_addr_r=0x73000000\0" \
46 "scriptaddr=0x74000000\0" \
47 "ramdisk_addr_r=0x80000000\0" \
48 "kernel_addr_r=0x72000000\0" \
49 "fdt_high=0xffffffff\0" \
50 "console=ttymxc1,115200\0" \
52 "stdout=serial,vidconsole\0" \
53 "stderr=serial,vidconsole\0" \
54 "fdtfile=imx53-cx9020.dtb\0" \
57 /* Miscellaneous configurable options */
59 /* Physical Memory Map */
60 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
61 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
62 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
63 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
64 #define PHYS_SDRAM_SIZE (gd->ram_size)
66 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
67 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
68 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
70 /* environment organization */
72 /* Framebuffer and LCD */
73 #define CONFIG_IMX_VIDEO_SKIP
75 #endif /* __CONFIG_H */