2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
4 * Configuration settings for the MX53ARD Freescale board.
6 * SPDX-License-Identifier: GPL-2.0+
14 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD
16 #include <asm/arch/imx-regs.h>
18 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
19 #define CONFIG_SETUP_MEMORY_TAGS
20 #define CONFIG_INITRD_TAG
21 #define CONFIG_REVISION_TAG
23 #define CONFIG_SYS_FSL_CLK
25 /* Size of malloc() pool */
26 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
28 #define CONFIG_MXC_GPIO
30 #define CONFIG_SYS_MAX_NAND_DEVICE 1
31 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
32 #define CONFIG_NAND_MXC
33 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
34 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
35 #define CONFIG_SYS_NAND_LARGEPAGE
36 #define CONFIG_MXC_NAND_HWECC
37 #define CONFIG_SYS_NAND_USE_FLASH_BBT
38 #define CONFIG_CMD_NAND
40 #define CONFIG_MXC_UART
41 #define CONFIG_MXC_UART_BASE UART1_BASE
44 #define CONFIG_SYS_I2C
45 #define CONFIG_SYS_I2C_MXC
46 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
47 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
48 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
51 #define CONFIG_FSL_ESDHC
52 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
53 #define CONFIG_SYS_FSL_ESDHC_NUM 2
56 #define CONFIG_HAS_ETH1
59 /* allow to overwrite serial and ethaddr */
60 #define CONFIG_ENV_OVERWRITE
61 #define CONFIG_CONS_INDEX 1
62 #define CONFIG_BAUDRATE 115200
64 /* Command definition */
66 #define CONFIG_ETHPRIME "smc911x"
69 #define CONFIG_SMC911X
70 #define CONFIG_SMC911X_16_BIT
71 #define CONFIG_SMC911X_BASE CS1_BASE_ADDR
73 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
74 #define CONFIG_SYS_TEXT_BASE 0x77800000
76 #define CONFIG_EXTRA_ENV_SETTINGS \
80 "fdt_high=0xffffffff\0" \
81 "initrd_high=0xffffffff\0" \
82 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
83 "fdt_addr=0x78000000\0" \
86 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
88 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
89 "update_sd_firmware_filename=u-boot.imx\0" \
90 "update_sd_firmware=" \
91 "if test ${ip_dyn} = yes; then " \
92 "setenv get_cmd dhcp; " \
94 "setenv get_cmd tftp; " \
96 "if mmc dev ${mmcdev}; then " \
97 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
98 "setexpr fw_sz ${filesize} / 0x200; " \
99 "setexpr fw_sz ${fw_sz} + 1; " \
100 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
103 "mmcargs=setenv bootargs console=${console},${baudrate} " \
104 "root=${mmcroot}\0" \
106 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
107 "bootscript=echo Running bootscript from mmc ...; " \
109 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
110 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
111 "mmcboot=echo Booting from mmc ...; " \
113 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
114 "if run loadfdt; then " \
115 "bootz ${loadaddr} - ${fdt_addr}; " \
117 "if test ${boot_fdt} = try; then " \
120 "echo WARN: Cannot load the DT; " \
126 "netargs=setenv bootargs console=${console},${baudrate} " \
128 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
129 "netboot=echo Booting from net ...; " \
131 "if test ${ip_dyn} = yes; then " \
132 "setenv get_cmd dhcp; " \
134 "setenv get_cmd tftp; " \
136 "${get_cmd} ${uimage}; " \
137 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
138 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
139 "bootz ${loadaddr} - ${fdt_addr}; " \
141 "if test ${boot_fdt} = try; then " \
144 "echo WARN: Cannot load the DT; " \
151 #define CONFIG_BOOTCOMMAND \
152 "mmc dev ${mmcdev}; if mmc rescan; then " \
153 "if run loadbootscript; then " \
156 "if run loaduimage; then " \
158 "else run netboot; " \
161 "else run netboot; fi"
163 #define CONFIG_ARP_TIMEOUT 200UL
165 /* Miscellaneous configurable options */
166 #define CONFIG_SYS_LONGHELP /* undef to save memory */
167 #define CONFIG_AUTO_COMPLETE
168 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
170 /* Print Buffer Size */
171 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
172 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
173 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
175 #define CONFIG_SYS_MEMTEST_START 0x70000000
176 #define CONFIG_SYS_MEMTEST_END 0x70010000
178 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
180 #define CONFIG_CMDLINE_EDITING
182 /* Physical Memory Map */
183 #define CONFIG_NR_DRAM_BANKS 2
184 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
185 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
186 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
187 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
188 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
190 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
191 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
192 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
194 #define CONFIG_SYS_INIT_SP_OFFSET \
195 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
196 #define CONFIG_SYS_INIT_SP_ADDR \
197 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
199 /* FLASH and environment organization */
200 #define CONFIG_SYS_NO_FLASH
202 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
203 #define CONFIG_ENV_SIZE (8 * 1024)
204 #define CONFIG_ENV_IS_IN_MMC
205 #define CONFIG_SYS_MMC_ENV_DEV 0
207 #define MX53ARD_CS1GCR1 (CSEN | DSZ(2))
208 #define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22))
209 #define MX53ARD_CS1RCR2 RBEN(2)
210 #define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22))
212 #endif /* __CONFIG_H */