2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
4 * Configuration settings for the MX53ARD Freescale board.
6 * SPDX-License-Identifier: GPL-2.0+
14 #define CONFIG_DISPLAY_BOARDINFO
16 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD
18 #include <asm/arch/imx-regs.h>
20 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
21 #define CONFIG_SETUP_MEMORY_TAGS
22 #define CONFIG_INITRD_TAG
23 #define CONFIG_REVISION_TAG
25 #define CONFIG_SYS_FSL_CLK
27 /* Size of malloc() pool */
28 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
30 #define CONFIG_BOARD_EARLY_INIT_F
31 #define CONFIG_MXC_GPIO
33 #define CONFIG_SYS_MAX_NAND_DEVICE 1
34 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
35 #define CONFIG_NAND_MXC
36 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
37 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
38 #define CONFIG_SYS_NAND_LARGEPAGE
39 #define CONFIG_MXC_NAND_HWECC
40 #define CONFIG_SYS_NAND_USE_FLASH_BBT
41 #define CONFIG_CMD_NAND
43 #define CONFIG_MXC_UART
44 #define CONFIG_MXC_UART_BASE UART1_BASE
47 #define CONFIG_SYS_I2C
48 #define CONFIG_SYS_I2C_MXC
49 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
50 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
51 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
54 #define CONFIG_FSL_ESDHC
55 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
56 #define CONFIG_SYS_FSL_ESDHC_NUM 2
59 #define CONFIG_GENERIC_MMC
60 #define CONFIG_DOS_PARTITION
63 #define CONFIG_HAS_ETH1
66 /* allow to overwrite serial and ethaddr */
67 #define CONFIG_ENV_OVERWRITE
68 #define CONFIG_CONS_INDEX 1
69 #define CONFIG_BAUDRATE 115200
71 /* Command definition */
73 #define CONFIG_ETHPRIME "smc911x"
76 #define CONFIG_SMC911X
77 #define CONFIG_SMC911X_16_BIT
78 #define CONFIG_SMC911X_BASE CS1_BASE_ADDR
80 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
81 #define CONFIG_SYS_TEXT_BASE 0x77800000
83 #define CONFIG_DEFAULT_FDT_FILE "imx53-ard.dtb"
85 #define CONFIG_EXTRA_ENV_SETTINGS \
89 "fdt_high=0xffffffff\0" \
90 "initrd_high=0xffffffff\0" \
91 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
92 "fdt_addr=0x78000000\0" \
95 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
97 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
98 "update_sd_firmware_filename=u-boot.imx\0" \
99 "update_sd_firmware=" \
100 "if test ${ip_dyn} = yes; then " \
101 "setenv get_cmd dhcp; " \
103 "setenv get_cmd tftp; " \
105 "if mmc dev ${mmcdev}; then " \
106 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
107 "setexpr fw_sz ${filesize} / 0x200; " \
108 "setexpr fw_sz ${fw_sz} + 1; " \
109 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
112 "mmcargs=setenv bootargs console=${console},${baudrate} " \
113 "root=${mmcroot}\0" \
115 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
116 "bootscript=echo Running bootscript from mmc ...; " \
118 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
119 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
120 "mmcboot=echo Booting from mmc ...; " \
122 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
123 "if run loadfdt; then " \
124 "bootz ${loadaddr} - ${fdt_addr}; " \
126 "if test ${boot_fdt} = try; then " \
129 "echo WARN: Cannot load the DT; " \
135 "netargs=setenv bootargs console=${console},${baudrate} " \
137 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
138 "netboot=echo Booting from net ...; " \
140 "if test ${ip_dyn} = yes; then " \
141 "setenv get_cmd dhcp; " \
143 "setenv get_cmd tftp; " \
145 "${get_cmd} ${uimage}; " \
146 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
147 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
148 "bootz ${loadaddr} - ${fdt_addr}; " \
150 "if test ${boot_fdt} = try; then " \
153 "echo WARN: Cannot load the DT; " \
160 #define CONFIG_BOOTCOMMAND \
161 "mmc dev ${mmcdev}; if mmc rescan; then " \
162 "if run loadbootscript; then " \
165 "if run loaduimage; then " \
167 "else run netboot; " \
170 "else run netboot; fi"
172 #define CONFIG_ARP_TIMEOUT 200UL
174 /* Miscellaneous configurable options */
175 #define CONFIG_SYS_LONGHELP /* undef to save memory */
176 #define CONFIG_AUTO_COMPLETE
177 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
179 /* Print Buffer Size */
180 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
181 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
182 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
184 #define CONFIG_SYS_MEMTEST_START 0x70000000
185 #define CONFIG_SYS_MEMTEST_END 0x70010000
187 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
189 #define CONFIG_CMDLINE_EDITING
191 /* Physical Memory Map */
192 #define CONFIG_NR_DRAM_BANKS 2
193 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
194 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
195 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
196 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
197 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
199 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
200 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
201 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
203 #define CONFIG_SYS_INIT_SP_OFFSET \
204 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
205 #define CONFIG_SYS_INIT_SP_ADDR \
206 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
208 /* FLASH and environment organization */
209 #define CONFIG_SYS_NO_FLASH
211 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
212 #define CONFIG_ENV_SIZE (8 * 1024)
213 #define CONFIG_ENV_IS_IN_MMC
214 #define CONFIG_SYS_MMC_ENV_DEV 0
216 #define MX53ARD_CS1GCR1 (CSEN | DSZ(2))
217 #define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22))
218 #define MX53ARD_CS1RCR2 RBEN(2)
219 #define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22))
221 #endif /* __CONFIG_H */