2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
4 * Configuration settings for the MX53ARD Freescale board.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #define CONFIG_SYS_MX5_HCLK 24000000
28 #define CONFIG_SYS_MX5_CLK32 32768
29 #define CONFIG_DISPLAY_CPUINFO
30 #define CONFIG_DISPLAY_BOARDINFO
32 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD
34 #include <asm/arch/imx-regs.h>
36 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
37 #define CONFIG_SETUP_MEMORY_TAGS
38 #define CONFIG_INITRD_TAG
40 /* Size of malloc() pool */
41 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
43 #define CONFIG_BOARD_EARLY_INIT_F
44 #define CONFIG_MXC_GPIO
46 #define CONFIG_MXC_UART
47 #define CONFIG_MXC_UART_BASE UART1_BASE
50 #define CONFIG_CMD_I2C
51 #define CONFIG_HARD_I2C
52 #define CONFIG_I2C_MXC
53 #define CONFIG_SYS_I2C_MX53_PORT2
54 #define CONFIG_SYS_I2C_SPEED 100000
57 #define CONFIG_FSL_ESDHC
58 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
59 #define CONFIG_SYS_FSL_ESDHC_NUM 2
62 #define CONFIG_CMD_MMC
63 #define CONFIG_GENERIC_MMC
64 #define CONFIG_CMD_FAT
65 #define CONFIG_DOS_PARTITION
68 #define CONFIG_HAS_ETH1
70 #define CONFIG_DISCOVER_PHY
72 #define CONFIG_CMD_PING
73 #define CONFIG_CMD_DHCP
74 #define CONFIG_CMD_MII
75 #define CONFIG_CMD_NET
77 /* allow to overwrite serial and ethaddr */
78 #define CONFIG_ENV_OVERWRITE
79 #define CONFIG_CONS_INDEX 1
80 #define CONFIG_BAUDRATE 115200
82 /* Command definition */
83 #include <config_cmd_default.h>
85 #undef CONFIG_CMD_IMLS
87 #define CONFIG_BOOTDELAY 3
89 #define CONFIG_ETHPRIME "smc911x"
92 #define CONFIG_SMC911X
93 #define CONFIG_SMC911X_16_BIT
94 #define CONFIG_SMC911X_BASE CS1_BASE_ADDR
96 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
97 #define CONFIG_SYS_TEXT_BASE 0x77800000
99 #define CONFIG_EXTRA_ENV_SETTINGS \
100 "script=boot.scr\0" \
104 "mmcroot=/dev/mmcblk0p3 rw\0" \
105 "mmcrootfstype=ext3 rootwait\0" \
106 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
108 "rootfstype=${mmcrootfstype}\0" \
110 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
111 "bootscript=echo Running bootscript from mmc ...; " \
113 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
114 "mmcboot=echo Booting from mmc ...; " \
117 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
119 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
120 "netboot=echo Booting from net ...; " \
122 "dhcp ${uimage}; bootm\0" \
124 #define CONFIG_BOOTCOMMAND \
125 "if mmc rescan ${mmcdev}; then " \
126 "if run loadbootscript; then " \
129 "if run loaduimage; then " \
131 "else run netboot; " \
134 "else run netboot; fi"
135 #define CONFIG_ARP_TIMEOUT 200UL
137 /* Miscellaneous configurable options */
138 #define CONFIG_SYS_LONGHELP /* undef to save memory */
139 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
140 #define CONFIG_SYS_PROMPT "MX53ARD U-Boot > "
141 #define CONFIG_AUTO_COMPLETE
142 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
144 /* Print Buffer Size */
145 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
146 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
147 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
149 #define CONFIG_SYS_MEMTEST_START 0x70000000
150 #define CONFIG_SYS_MEMTEST_END 0x70010000
152 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
154 #define CONFIG_SYS_HZ 1000
155 #define CONFIG_CMDLINE_EDITING
158 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
160 /* Physical Memory Map */
161 #define CONFIG_NR_DRAM_BANKS 2
162 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
163 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
164 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
165 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
166 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
168 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
169 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
170 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
172 #define CONFIG_SYS_INIT_SP_OFFSET \
173 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
174 #define CONFIG_SYS_INIT_SP_ADDR \
175 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
177 /* FLASH and environment organization */
178 #define CONFIG_SYS_NO_FLASH
180 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
181 #define CONFIG_ENV_SIZE (8 * 1024)
182 #define CONFIG_ENV_IS_IN_MMC
183 #define CONFIG_SYS_MMC_ENV_DEV 0
185 #define CONFIG_OF_LIBFDT
187 #define MX53ARD_CS1GCR1 (CSEN | DSZ(2))
188 #define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22))
189 #define MX53ARD_CS1RCR2 RBEN(2)
190 #define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22))
192 #endif /* __CONFIG_H */