1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2011 Freescale Semiconductor, Inc.
5 * Configuration settings for the MX53ARD Freescale board.
11 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD
13 #include <asm/arch/imx-regs.h>
15 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
16 #define CONFIG_SETUP_MEMORY_TAGS
17 #define CONFIG_INITRD_TAG
18 #define CONFIG_REVISION_TAG
20 #define CONFIG_SYS_FSL_CLK
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
25 #define CONFIG_SYS_MAX_NAND_DEVICE 1
26 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
27 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
28 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
29 #define CONFIG_SYS_NAND_LARGEPAGE
30 #define CONFIG_MXC_NAND_HWECC
32 #define CONFIG_MXC_UART_BASE UART1_BASE
35 #define CONFIG_SYS_I2C
36 #define CONFIG_SYS_I2C_MXC
37 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
38 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
39 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
42 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
43 #define CONFIG_SYS_FSL_ESDHC_NUM 2
46 #define CONFIG_HAS_ETH1
48 /* Command definition */
50 #define CONFIG_ETHPRIME "smc911x"
52 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
54 #define CONFIG_EXTRA_ENV_SETTINGS \
58 "fdt_high=0xffffffff\0" \
59 "initrd_high=0xffffffff\0" \
60 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
61 "fdt_addr=0x78000000\0" \
64 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
66 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
67 "update_sd_firmware_filename=u-boot.imx\0" \
68 "update_sd_firmware=" \
69 "if test ${ip_dyn} = yes; then " \
70 "setenv get_cmd dhcp; " \
72 "setenv get_cmd tftp; " \
74 "if mmc dev ${mmcdev}; then " \
75 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
76 "setexpr fw_sz ${filesize} / 0x200; " \
77 "setexpr fw_sz ${fw_sz} + 1; " \
78 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
81 "mmcargs=setenv bootargs console=${console},${baudrate} " \
84 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
85 "bootscript=echo Running bootscript from mmc ...; " \
87 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
88 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
89 "mmcboot=echo Booting from mmc ...; " \
91 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
92 "if run loadfdt; then " \
93 "bootz ${loadaddr} - ${fdt_addr}; " \
95 "if test ${boot_fdt} = try; then " \
98 "echo WARN: Cannot load the DT; " \
104 "netargs=setenv bootargs console=${console},${baudrate} " \
106 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
107 "netboot=echo Booting from net ...; " \
109 "if test ${ip_dyn} = yes; then " \
110 "setenv get_cmd dhcp; " \
112 "setenv get_cmd tftp; " \
114 "${get_cmd} ${uimage}; " \
115 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
116 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
117 "bootz ${loadaddr} - ${fdt_addr}; " \
119 "if test ${boot_fdt} = try; then " \
122 "echo WARN: Cannot load the DT; " \
129 #define CONFIG_BOOTCOMMAND \
130 "mmc dev ${mmcdev}; if mmc rescan; then " \
131 "if run loadbootscript; then " \
134 "if run loaduimage; then " \
136 "else run netboot; " \
139 "else run netboot; fi"
141 #define CONFIG_ARP_TIMEOUT 200UL
143 /* Miscellaneous configurable options */
145 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
147 /* Physical Memory Map */
148 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
149 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
150 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
151 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
152 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
154 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
155 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
156 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
158 #define CONFIG_SYS_INIT_SP_OFFSET \
159 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
160 #define CONFIG_SYS_INIT_SP_ADDR \
161 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
163 /* environment organization */
165 #define MX53ARD_CS1GCR1 (CSEN | DSZ(2))
166 #define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22))
167 #define MX53ARD_CS1RCR2 RBEN(2)
168 #define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22))
170 #endif /* __CONFIG_H */