1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
5 * (C) Copyright 2009 Freescale Semiconductor, Inc.
7 * Configuration settings for the MX51EVK Board
13 /* High Level Configuration Options */
15 #include <asm/arch/imx-regs.h>
21 #define CONFIG_MXC_UART_BASE UART1_BASE
24 #define CONFIG_FSL_PMIC_BUS 0
25 #define CONFIG_FSL_PMIC_CS 0
26 #define CONFIG_FSL_PMIC_CLK 2500000
27 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
28 #define CONFIG_FSL_PMIC_BITLEN 32
29 #define CONFIG_RTC_MC13XXX
34 #define CFG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
37 #define CONFIG_MXC_USB_PORT 1
38 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI
39 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
41 /* Framebuffer and LCD */
43 #define CONFIG_EXTRA_ENV_SETTINGS \
46 "fdt_file=imx51-babbage.dtb\0" \
47 "fdt_addr=0x91000000\0" \
52 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
53 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
56 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
57 "bootscript=echo Running bootscript from mmc ...; " \
59 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
60 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
61 "mmcboot=echo Booting from mmc ...; " \
63 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
64 "if run loadfdt; then " \
65 "bootz ${loadaddr} - ${fdt_addr}; " \
67 "if test ${boot_fdt} = try; then " \
70 "echo WARN: Cannot load the DT; " \
76 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
78 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
79 "netboot=echo Booting from net ...; " \
81 "if test ${ip_dyn} = yes; then " \
82 "setenv get_cmd dhcp; " \
84 "setenv get_cmd tftp; " \
86 "${get_cmd} ${image}; " \
87 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
88 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
89 "bootz ${loadaddr} - ${fdt_addr}; " \
91 "if test ${boot_fdt} = try; then " \
94 "echo ERROR: Cannot load the DT; " \
103 * Miscellaneous configurable options
106 /*-----------------------------------------------------------------------
107 * Physical Memory Map
109 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
110 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
112 #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
113 #define CFG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
114 #define CFG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
116 #define CFG_SYS_DDR_CLKSEL 0
117 #define CFG_SYS_CLKTL_CBCDR 0x59E35100
118 #define CFG_SYS_MAIN_PWR_ON
120 /*-----------------------------------------------------------------------
121 * environment organization