2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
6 * Configuration settings for the MX51EVK Board
8 * SPDX-License-Identifier: GPL-2.0+
14 /* High Level Configuration Options */
16 #define CONFIG_SYS_FSL_CLK
17 #define CONFIG_SYS_TEXT_BASE 0x97800000
19 #include <asm/arch/imx-regs.h>
21 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
22 #define CONFIG_SETUP_MEMORY_TAGS
23 #define CONFIG_INITRD_TAG
24 #define CONFIG_REVISION_TAG
26 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE
28 * Size of malloc() pool
30 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
35 #define CONFIG_FSL_IIM
36 #define CONFIG_CMD_FUSE
38 #define CONFIG_MXC_UART
39 #define CONFIG_MXC_UART_BASE UART1_BASE
40 #define CONFIG_MXC_GPIO
46 #define CONFIG_MXC_SPI
50 #define CONFIG_POWER_SPI
51 #define CONFIG_POWER_FSL
52 #define CONFIG_FSL_PMIC_BUS 0
53 #define CONFIG_FSL_PMIC_CS 0
54 #define CONFIG_FSL_PMIC_CLK 2500000
55 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
56 #define CONFIG_FSL_PMIC_BITLEN 32
57 #define CONFIG_RTC_MC13XXX
62 #define CONFIG_FSL_ESDHC
63 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
64 #define CONFIG_SYS_FSL_ESDHC_NUM 2
71 #define CONFIG_FEC_MXC
72 #define IMX_FEC_BASE FEC_BASE_ADDR
73 #define CONFIG_FEC_MXC_PHYADDR 0x1F
76 #define CONFIG_USB_EHCI_MX5
77 #define CONFIG_USB_HOST_ETHER
78 #define CONFIG_USB_ETHER_ASIX
79 #define CONFIG_USB_ETHER_SMSC95XX
80 #define CONFIG_MXC_USB_PORT 1
81 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI
82 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
84 /* Framebuffer and LCD */
85 #define CONFIG_PREBOOT
86 #define CONFIG_VIDEO_IPUV3
87 #define CONFIG_VIDEO_BMP_RLE8
88 #define CONFIG_SPLASH_SCREEN
89 #define CONFIG_BMP_16BPP
90 #define CONFIG_VIDEO_LOGO
91 #define CONFIG_IPUV3_CLK 133000000
93 /* allow to overwrite serial and ethaddr */
94 #define CONFIG_ENV_OVERWRITE
95 #define CONFIG_CONS_INDEX 1
97 #define CONFIG_ETHPRIME "FEC0"
99 #define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */
101 #define CONFIG_EXTRA_ENV_SETTINGS \
102 "script=boot.scr\0" \
104 "fdt_file=imx51-babbage.dtb\0" \
105 "fdt_addr=0x91000000\0" \
110 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
111 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
112 "root=${mmcroot}\0" \
114 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
115 "bootscript=echo Running bootscript from mmc ...; " \
117 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
118 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
119 "mmcboot=echo Booting from mmc ...; " \
121 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
122 "if run loadfdt; then " \
123 "bootz ${loadaddr} - ${fdt_addr}; " \
125 "if test ${boot_fdt} = try; then " \
128 "echo WARN: Cannot load the DT; " \
134 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
136 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
137 "netboot=echo Booting from net ...; " \
139 "if test ${ip_dyn} = yes; then " \
140 "setenv get_cmd dhcp; " \
142 "setenv get_cmd tftp; " \
144 "${get_cmd} ${image}; " \
145 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
146 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
147 "bootz ${loadaddr} - ${fdt_addr}; " \
149 "if test ${boot_fdt} = try; then " \
152 "echo ERROR: Cannot load the DT; " \
160 #define CONFIG_BOOTCOMMAND \
161 "mmc dev ${mmcdev}; if mmc rescan; then " \
162 "if run loadbootscript; then " \
165 "if run loadimage; then " \
167 "else run netboot; " \
170 "else run netboot; fi"
172 #define CONFIG_ARP_TIMEOUT 200UL
175 * Miscellaneous configurable options
177 #define CONFIG_SYS_LONGHELP /* undef to save memory */
178 #define CONFIG_AUTO_COMPLETE
179 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
180 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
181 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
183 #define CONFIG_SYS_MEMTEST_START 0x90000000
184 #define CONFIG_SYS_MEMTEST_END 0x90010000
186 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
188 #define CONFIG_CMDLINE_EDITING
190 /*-----------------------------------------------------------------------
191 * Physical Memory Map
193 #define CONFIG_NR_DRAM_BANKS 1
194 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
195 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
197 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
198 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
199 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
201 #define CONFIG_SYS_INIT_SP_OFFSET \
202 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
203 #define CONFIG_SYS_INIT_SP_ADDR \
204 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
206 #define CONFIG_SYS_DDR_CLKSEL 0
207 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
208 #define CONFIG_SYS_MAIN_PWR_ON
210 /*-----------------------------------------------------------------------
211 * environment organization
213 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
214 #define CONFIG_ENV_SIZE (8 * 1024)
215 #define CONFIG_ENV_IS_IN_MMC
216 #define CONFIG_SYS_MMC_ENV_DEV 0