2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
6 * Configuration settings for the MX51EVK Board
8 * SPDX-License-Identifier: GPL-2.0+
14 /* High Level Configuration Options */
16 #define CONFIG_MX51 /* in a mx51 */
18 #define CONFIG_SYS_FSL_CLK
19 #define CONFIG_SYS_TEXT_BASE 0x97800000
21 #include <asm/arch/imx-regs.h>
23 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
24 #define CONFIG_SETUP_MEMORY_TAGS
25 #define CONFIG_INITRD_TAG
26 #define CONFIG_REVISION_TAG
28 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE
30 * Size of malloc() pool
32 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
37 #define CONFIG_FSL_IIM
38 #define CONFIG_CMD_FUSE
40 #define CONFIG_MXC_UART
41 #define CONFIG_MXC_UART_BASE UART1_BASE
42 #define CONFIG_MXC_GPIO
48 #define CONFIG_MXC_SPI
52 #define CONFIG_POWER_SPI
53 #define CONFIG_POWER_FSL
54 #define CONFIG_FSL_PMIC_BUS 0
55 #define CONFIG_FSL_PMIC_CS 0
56 #define CONFIG_FSL_PMIC_CLK 2500000
57 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
58 #define CONFIG_FSL_PMIC_BITLEN 32
59 #define CONFIG_RTC_MC13XXX
64 #define CONFIG_FSL_ESDHC
65 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
66 #define CONFIG_SYS_FSL_ESDHC_NUM 2
73 #define CONFIG_FEC_MXC
74 #define IMX_FEC_BASE FEC_BASE_ADDR
75 #define CONFIG_FEC_MXC_PHYADDR 0x1F
78 #define CONFIG_USB_EHCI
79 #define CONFIG_USB_EHCI_MX5
80 #define CONFIG_USB_HOST_ETHER
81 #define CONFIG_USB_ETHER_ASIX
82 #define CONFIG_USB_ETHER_SMSC95XX
83 #define CONFIG_MXC_USB_PORT 1
84 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI
85 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
87 /* Framebuffer and LCD */
88 #define CONFIG_PREBOOT
89 #define CONFIG_VIDEO_IPUV3
90 #define CONFIG_VIDEO_BMP_RLE8
91 #define CONFIG_SPLASH_SCREEN
92 #define CONFIG_BMP_16BPP
93 #define CONFIG_VIDEO_LOGO
94 #define CONFIG_IPUV3_CLK 133000000
96 /* allow to overwrite serial and ethaddr */
97 #define CONFIG_ENV_OVERWRITE
98 #define CONFIG_CONS_INDEX 1
99 #define CONFIG_BAUDRATE 115200
101 /***********************************************************
103 ***********************************************************/
105 #define CONFIG_CMD_DATE
108 #define CONFIG_ETHPRIME "FEC0"
110 #define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */
112 #define CONFIG_EXTRA_ENV_SETTINGS \
113 "script=boot.scr\0" \
115 "fdt_file=imx51-babbage.dtb\0" \
116 "fdt_addr=0x91000000\0" \
121 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
122 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
123 "root=${mmcroot}\0" \
125 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
126 "bootscript=echo Running bootscript from mmc ...; " \
128 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
129 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
130 "mmcboot=echo Booting from mmc ...; " \
132 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
133 "if run loadfdt; then " \
134 "bootz ${loadaddr} - ${fdt_addr}; " \
136 "if test ${boot_fdt} = try; then " \
139 "echo WARN: Cannot load the DT; " \
145 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
147 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
148 "netboot=echo Booting from net ...; " \
150 "if test ${ip_dyn} = yes; then " \
151 "setenv get_cmd dhcp; " \
153 "setenv get_cmd tftp; " \
155 "${get_cmd} ${image}; " \
156 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
157 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
158 "bootz ${loadaddr} - ${fdt_addr}; " \
160 "if test ${boot_fdt} = try; then " \
163 "echo ERROR: Cannot load the DT; " \
171 #define CONFIG_BOOTCOMMAND \
172 "mmc dev ${mmcdev}; if mmc rescan; then " \
173 "if run loadbootscript; then " \
176 "if run loadimage; then " \
178 "else run netboot; " \
181 "else run netboot; fi"
183 #define CONFIG_ARP_TIMEOUT 200UL
186 * Miscellaneous configurable options
188 #define CONFIG_SYS_LONGHELP /* undef to save memory */
189 #define CONFIG_AUTO_COMPLETE
190 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
191 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
192 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
194 #define CONFIG_SYS_MEMTEST_START 0x90000000
195 #define CONFIG_SYS_MEMTEST_END 0x90010000
197 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
199 #define CONFIG_CMDLINE_EDITING
201 /*-----------------------------------------------------------------------
202 * Physical Memory Map
204 #define CONFIG_NR_DRAM_BANKS 1
205 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
206 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
208 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
209 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
210 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
212 #define CONFIG_SYS_INIT_SP_OFFSET \
213 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
214 #define CONFIG_SYS_INIT_SP_ADDR \
215 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
217 #define CONFIG_SYS_DDR_CLKSEL 0
218 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
219 #define CONFIG_SYS_MAIN_PWR_ON
221 /*-----------------------------------------------------------------------
222 * FLASH and environment organization
224 #define CONFIG_SYS_NO_FLASH
226 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
227 #define CONFIG_ENV_SIZE (8 * 1024)
228 #define CONFIG_ENV_IS_IN_MMC
229 #define CONFIG_SYS_MMC_ENV_DEV 0