2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
6 * Configuration settings for the MX51EVK Board
8 * SPDX-License-Identifier: GPL-2.0+
14 /* High Level Configuration Options */
16 #define CONFIG_MX51 /* in a mx51 */
18 #define CONFIG_DISPLAY_BOARDINFO
20 #define CONFIG_SYS_FSL_CLK
21 #define CONFIG_SYS_TEXT_BASE 0x97800000
23 #include <asm/arch/imx-regs.h>
25 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
26 #define CONFIG_SETUP_MEMORY_TAGS
27 #define CONFIG_INITRD_TAG
28 #define CONFIG_REVISION_TAG
30 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE
32 * Size of malloc() pool
34 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
36 #define CONFIG_BOARD_LATE_INIT
41 #define CONFIG_FSL_IIM
42 #define CONFIG_CMD_FUSE
44 #define CONFIG_MXC_UART
45 #define CONFIG_MXC_UART_BASE UART1_BASE
46 #define CONFIG_MXC_GPIO
52 #define CONFIG_MXC_SPI
56 #define CONFIG_POWER_SPI
57 #define CONFIG_POWER_FSL
58 #define CONFIG_FSL_PMIC_BUS 0
59 #define CONFIG_FSL_PMIC_CS 0
60 #define CONFIG_FSL_PMIC_CLK 2500000
61 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
62 #define CONFIG_FSL_PMIC_BITLEN 32
63 #define CONFIG_RTC_MC13XXX
68 #define CONFIG_FSL_ESDHC
69 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
70 #define CONFIG_SYS_FSL_ESDHC_NUM 2
74 #define CONFIG_GENERIC_MMC
75 #define CONFIG_DOS_PARTITION
82 #define CONFIG_FEC_MXC
83 #define IMX_FEC_BASE FEC_BASE_ADDR
84 #define CONFIG_FEC_MXC_PHYADDR 0x1F
87 #define CONFIG_USB_EHCI
88 #define CONFIG_USB_EHCI_MX5
89 #define CONFIG_USB_HOST_ETHER
90 #define CONFIG_USB_ETHER_ASIX
91 #define CONFIG_USB_ETHER_SMSC95XX
92 #define CONFIG_MXC_USB_PORT 1
93 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI
94 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
96 /* Framebuffer and LCD */
97 #define CONFIG_PREBOOT
99 #define CONFIG_VIDEO_IPUV3
100 #define CONFIG_CFB_CONSOLE
101 #define CONFIG_VGA_AS_SINGLE_DEVICE
102 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
103 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
104 #define CONFIG_VIDEO_BMP_RLE8
105 #define CONFIG_SPLASH_SCREEN
106 #define CONFIG_BMP_16BPP
107 #define CONFIG_VIDEO_LOGO
108 #define CONFIG_IPUV3_CLK 133000000
110 /* allow to overwrite serial and ethaddr */
111 #define CONFIG_ENV_OVERWRITE
112 #define CONFIG_CONS_INDEX 1
113 #define CONFIG_BAUDRATE 115200
115 /***********************************************************
117 ***********************************************************/
119 #define CONFIG_CMD_DATE
122 #define CONFIG_ETHPRIME "FEC0"
124 #define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */
126 #define CONFIG_EXTRA_ENV_SETTINGS \
127 "script=boot.scr\0" \
129 "fdt_file=imx51-babbage.dtb\0" \
130 "fdt_addr=0x91000000\0" \
135 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
136 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
137 "root=${mmcroot}\0" \
139 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
140 "bootscript=echo Running bootscript from mmc ...; " \
142 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
143 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
144 "mmcboot=echo Booting from mmc ...; " \
146 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
147 "if run loadfdt; then " \
148 "bootz ${loadaddr} - ${fdt_addr}; " \
150 "if test ${boot_fdt} = try; then " \
153 "echo WARN: Cannot load the DT; " \
159 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
161 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
162 "netboot=echo Booting from net ...; " \
164 "if test ${ip_dyn} = yes; then " \
165 "setenv get_cmd dhcp; " \
167 "setenv get_cmd tftp; " \
169 "${get_cmd} ${image}; " \
170 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
171 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
172 "bootz ${loadaddr} - ${fdt_addr}; " \
174 "if test ${boot_fdt} = try; then " \
177 "echo ERROR: Cannot load the DT; " \
185 #define CONFIG_BOOTCOMMAND \
186 "mmc dev ${mmcdev}; if mmc rescan; then " \
187 "if run loadbootscript; then " \
190 "if run loadimage; then " \
192 "else run netboot; " \
195 "else run netboot; fi"
197 #define CONFIG_ARP_TIMEOUT 200UL
200 * Miscellaneous configurable options
202 #define CONFIG_SYS_LONGHELP /* undef to save memory */
203 #define CONFIG_AUTO_COMPLETE
204 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
205 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
206 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
208 #define CONFIG_SYS_MEMTEST_START 0x90000000
209 #define CONFIG_SYS_MEMTEST_END 0x90010000
211 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
213 #define CONFIG_CMDLINE_EDITING
215 /*-----------------------------------------------------------------------
216 * Physical Memory Map
218 #define CONFIG_NR_DRAM_BANKS 1
219 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
220 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
222 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
223 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
224 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
226 #define CONFIG_BOARD_EARLY_INIT_F
228 #define CONFIG_SYS_INIT_SP_OFFSET \
229 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
230 #define CONFIG_SYS_INIT_SP_ADDR \
231 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
233 #define CONFIG_SYS_DDR_CLKSEL 0
234 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
235 #define CONFIG_SYS_MAIN_PWR_ON
237 /*-----------------------------------------------------------------------
238 * FLASH and environment organization
240 #define CONFIG_SYS_NO_FLASH
242 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
243 #define CONFIG_ENV_SIZE (8 * 1024)
244 #define CONFIG_ENV_IS_IN_MMC
245 #define CONFIG_SYS_MMC_ENV_DEV 0