1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
5 * (C) Copyright 2009 Freescale Semiconductor, Inc.
7 * Configuration settings for the MX51EVK Board
13 /* High Level Configuration Options */
15 #include <asm/arch/imx-regs.h>
21 #define CONFIG_MXC_UART_BASE UART1_BASE
24 #define CONFIG_FSL_PMIC_BUS 0
25 #define CONFIG_FSL_PMIC_CS 0
26 #define CONFIG_FSL_PMIC_CLK 2500000
27 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
28 #define CONFIG_FSL_PMIC_BITLEN 32
33 #define CFG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
36 #define CONFIG_MXC_USB_PORT 1
37 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI
38 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
40 /* Framebuffer and LCD */
42 #define CONFIG_EXTRA_ENV_SETTINGS \
45 "fdt_file=imx51-babbage.dtb\0" \
46 "fdt_addr=0x91000000\0" \
51 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
52 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
55 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
56 "bootscript=echo Running bootscript from mmc ...; " \
58 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
59 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
60 "mmcboot=echo Booting from mmc ...; " \
62 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
63 "if run loadfdt; then " \
64 "bootz ${loadaddr} - ${fdt_addr}; " \
66 "if test ${boot_fdt} = try; then " \
69 "echo WARN: Cannot load the DT; " \
75 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
77 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
78 "netboot=echo Booting from net ...; " \
80 "if test ${ip_dyn} = yes; then " \
81 "setenv get_cmd dhcp; " \
83 "setenv get_cmd tftp; " \
85 "${get_cmd} ${image}; " \
86 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
87 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
88 "bootz ${loadaddr} - ${fdt_addr}; " \
90 "if test ${boot_fdt} = try; then " \
93 "echo ERROR: Cannot load the DT; " \
102 * Miscellaneous configurable options
105 /*-----------------------------------------------------------------------
106 * Physical Memory Map
108 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
109 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
111 #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
112 #define CFG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
113 #define CFG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
115 #define CFG_SYS_DDR_CLKSEL 0
116 #define CFG_SYS_CLKTL_CBCDR 0x59E35100
117 #define CFG_SYS_MAIN_PWR_ON
119 /*-----------------------------------------------------------------------
120 * environment organization