2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
6 * Configuration settings for the MX51EVK Board
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 /* High Level Configuration Options */
29 #define CONFIG_MX51 /* in a mx51 */
31 #define CONFIG_SYS_MX5_HCLK 24000000
32 #define CONFIG_SYS_MX5_CLK32 32768
33 #define CONFIG_DISPLAY_CPUINFO
34 #define CONFIG_DISPLAY_BOARDINFO
36 #define CONFIG_SYS_TEXT_BASE 0x97800000
38 #include <asm/arch/imx-regs.h>
40 * Disabled for now due to build problems under Debian and a significant
41 * increase in the final file size: 144260 vs. 109536 Bytes.
44 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
45 #define CONFIG_SETUP_MEMORY_TAGS
46 #define CONFIG_INITRD_TAG
48 #define CONFIG_OF_LIBFDT
50 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE
52 * Size of malloc() pool
54 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
56 #define CONFIG_BOARD_LATE_INIT
61 #define CONFIG_MXC_UART
62 #define CONFIG_MXC_UART_BASE UART1_BASE
63 #define CONFIG_MXC_GPIO
68 #define CONFIG_CMD_SPI
70 #define CONFIG_MXC_SPI
74 #define CONFIG_PMIC_SPI
75 #define CONFIG_PMIC_FSL
76 #define CONFIG_FSL_PMIC_BUS 0
77 #define CONFIG_FSL_PMIC_CS 0
78 #define CONFIG_FSL_PMIC_CLK 2500000
79 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
80 #define CONFIG_FSL_PMIC_BITLEN 32
81 #define CONFIG_RTC_MC13XXX
86 #define CONFIG_FSL_ESDHC
87 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
88 #define CONFIG_SYS_FSL_ESDHC_NUM 2
92 #define CONFIG_CMD_MMC
93 #define CONFIG_GENERIC_MMC
94 #define CONFIG_CMD_FAT
95 #define CONFIG_DOS_PARTITION
100 #define CONFIG_HAS_ETH1
102 #define CONFIG_DISCOVER_PHY
104 #define CONFIG_FEC_MXC
105 #define IMX_FEC_BASE FEC_BASE_ADDR
106 #define CONFIG_FEC_MXC_PHYADDR 0x1F
108 #define CONFIG_CMD_PING
109 #define CONFIG_CMD_DHCP
110 #define CONFIG_CMD_MII
111 #define CONFIG_CMD_NET
114 #define CONFIG_CMD_USB
115 #define CONFIG_CMD_FAT
116 #define CONFIG_USB_EHCI
117 #define CONFIG_USB_EHCI_MX5
118 #define CONFIG_USB_STORAGE
119 #define CONFIG_USB_HOST_ETHER
120 #define CONFIG_USB_ETHER_ASIX
121 #define CONFIG_USB_ETHER_SMSC95XX
122 #define CONFIG_MXC_USB_PORT 1
123 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI
124 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
126 /* Framebuffer and LCD */
127 #define CONFIG_PREBOOT
129 #define CONFIG_VIDEO_MX5
130 #define CONFIG_CFB_CONSOLE
131 #define CONFIG_VGA_AS_SINGLE_DEVICE
132 #define CONFIG_VIDEO_BMP_RLE8
133 #define CONFIG_SPLASH_SCREEN
134 #define CONFIG_BMP_16BPP
135 #define CONFIG_VIDEO_LOGO
137 /* allow to overwrite serial and ethaddr */
138 #define CONFIG_ENV_OVERWRITE
139 #define CONFIG_CONS_INDEX 1
140 #define CONFIG_BAUDRATE 115200
142 /***********************************************************
144 ***********************************************************/
146 #include <config_cmd_default.h>
148 #undef CONFIG_CMD_IMLS
150 #define CONFIG_CMD_DATE
152 #define CONFIG_BOOTDELAY 3
154 #define CONFIG_ETHPRIME "FEC0"
156 #define CONFIG_LOADADDR 0x90800000 /* loadaddr env var */
158 #define CONFIG_EXTRA_ENV_SETTINGS \
159 "script=boot.scr\0" \
163 "mmcroot=/dev/mmcblk0p3 rw\0" \
164 "mmcrootfstype=ext3 rootwait\0" \
165 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
167 "rootfstype=${mmcrootfstype}\0" \
169 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
170 "bootscript=echo Running bootscript from mmc ...; " \
172 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
173 "mmcboot=echo Booting from mmc ...; " \
176 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
178 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
179 "netboot=echo Booting from net ...; " \
181 "dhcp ${uimage}; bootm\0" \
183 #define CONFIG_BOOTCOMMAND \
184 "if mmc rescan ${mmcdev}; then " \
185 "if run loadbootscript; then " \
188 "if run loaduimage; then " \
190 "else run netboot; " \
193 "else run netboot; fi"
195 #define CONFIG_ARP_TIMEOUT 200UL
198 * Miscellaneous configurable options
200 #define CONFIG_SYS_LONGHELP /* undef to save memory */
201 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
202 #define CONFIG_SYS_PROMPT "MX51EVK U-Boot > "
203 #define CONFIG_AUTO_COMPLETE
204 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
205 /* Print Buffer Size */
206 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
207 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
208 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
210 #define CONFIG_SYS_MEMTEST_START 0x90000000
211 #define CONFIG_SYS_MEMTEST_END 0x90010000
213 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
215 #define CONFIG_SYS_HZ 1000
216 #define CONFIG_CMDLINE_EDITING
218 /*-----------------------------------------------------------------------
221 * The stack sizes are set up in start.S using the settings below
223 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
225 /*-----------------------------------------------------------------------
226 * Physical Memory Map
228 #define CONFIG_NR_DRAM_BANKS 1
229 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
230 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
232 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
233 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
234 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
236 #define CONFIG_BOARD_EARLY_INIT_F
238 #define CONFIG_SYS_INIT_SP_OFFSET \
239 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
240 #define CONFIG_SYS_INIT_SP_ADDR \
241 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
243 #define CONFIG_SYS_DDR_CLKSEL 0
244 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
246 /*-----------------------------------------------------------------------
247 * FLASH and environment organization
249 #define CONFIG_SYS_NO_FLASH
251 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
252 #define CONFIG_ENV_SIZE (8 * 1024)
253 #define CONFIG_ENV_IS_IN_MMC
254 #define CONFIG_SYS_MMC_ENV_DEV 0