2 * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
8 * Configuration for the MX35pdk Freescale board.
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/arch/imx-regs.h>
31 /* High Level Configuration Options */
32 #define CONFIG_ARM1136 /* This is an arm1136 CPU core */
35 #define CONFIG_DISPLAY_CPUINFO
37 /* Set TEXT at the beginning of the NOR flash */
38 #define CONFIG_SYS_TEXT_BASE 0xA0000000
39 #define CONFIG_SYS_CACHELINE_SIZE 32
41 #define CONFIG_BOARD_EARLY_INIT_F
42 #define CONFIG_BOARD_LATE_INIT
44 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
45 #define CONFIG_REVISION_TAG
46 #define CONFIG_SETUP_MEMORY_TAGS
47 #define CONFIG_INITRD_TAG
50 * Size of malloc() pool
52 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
57 #define CONFIG_HARD_I2C
58 #define CONFIG_I2C_MXC
59 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
60 #define CONFIG_SYS_I2C_SPEED 100000
61 #define CONFIG_MXC_SPI
62 #define CONFIG_MXC_GPIO
69 #define CONFIG_POWER_I2C
70 #define CONFIG_POWER_FSL
71 #define CONFIG_PMIC_FSL_MC13892
72 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
73 #define CONFIG_RTC_MC13XXX
78 #define CONFIG_FSL_MC9SDZ60
79 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69
84 #define CONFIG_MXC_UART
85 #define CONFIG_MXC_UART_BASE UART1_BASE
87 /* allow to overwrite serial and ethaddr */
88 #define CONFIG_ENV_OVERWRITE
89 #define CONFIG_CONS_INDEX 1
90 #define CONFIG_BAUDRATE 115200
96 #include <config_cmd_default.h>
98 #define CONFIG_OF_LIBFDT
99 #define CONFIG_CMD_BOOTZ
100 #define CONFIG_CMD_PING
101 #define CONFIG_CMD_DHCP
102 #define CONFIG_BOOTP_SUBNETMASK
103 #define CONFIG_BOOTP_GATEWAY
104 #define CONFIG_BOOTP_DNS
106 #define CONFIG_CMD_NAND
107 #define CONFIG_CMD_CACHE
109 #define CONFIG_CMD_I2C
110 #define CONFIG_CMD_SPI
111 #define CONFIG_CMD_MII
112 #define CONFIG_CMD_NET
113 #define CONFIG_NET_RETRY_COUNT 100
114 #define CONFIG_CMD_DATE
116 #define CONFIG_CMD_USB
117 #define CONFIG_USB_STORAGE
118 #define CONFIG_CMD_MMC
119 #define CONFIG_DOS_PARTITION
120 #define CONFIG_EFI_PARTITION
121 #define CONFIG_CMD_EXT2
122 #define CONFIG_CMD_FAT
124 #define CONFIG_BOOTDELAY 1
126 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
129 * Ethernet on the debug board (SMC911)
131 #define CONFIG_SMC911X
132 #define CONFIG_SMC911X_16_BIT 1
133 #define CONFIG_SMC911X_BASE CS5_BASE_ADDR
135 #define CONFIG_HAS_ETH1
136 #define CONFIG_ETHPRIME
139 * Ethernet on SOC (FEC)
141 #define CONFIG_FEC_MXC
142 #define IMX_FEC_BASE FEC_BASE_ADDR
143 #define CONFIG_FEC_MXC_PHYADDR 0x1F
147 #define CONFIG_ARP_TIMEOUT 200UL
150 * Miscellaneous configurable options
152 #define CONFIG_SYS_LONGHELP /* undef to save memory */
153 #define CONFIG_SYS_PROMPT "MX35 U-Boot > "
154 #define CONFIG_CMDLINE_EDITING
155 #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
157 #define CONFIG_AUTO_COMPLETE
158 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
159 /* Print Buffer Size */
160 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
161 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
162 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
164 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
165 #define CONFIG_SYS_MEMTEST_END 0x10000
167 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
169 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
171 #define CONFIG_SYS_HZ 1000
174 * Physical Memory Map
176 #define CONFIG_NR_DRAM_BANKS 2
177 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
178 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
179 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
180 #define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024)
182 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
183 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
184 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
185 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
186 GENERATED_GBL_DATA_SIZE)
187 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
188 CONFIG_SYS_GBL_DATA_OFFSET)
191 * MTD Command for mtdparts
193 #define CONFIG_CMD_MTDPARTS
194 #define CONFIG_MTD_DEVICE
195 #define CONFIG_FLASH_CFI_MTD
196 #define CONFIG_MTD_PARTITIONS
197 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
198 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \
199 "96m(root),8m(cfg),1938m(user);" \
200 "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
203 * FLASH and environment organization
205 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
206 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
207 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
208 /* Monitor at beginning of flash */
209 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
210 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
212 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
213 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
215 /* Address and size of Redundant Environment Sector */
216 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
217 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
219 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
220 CONFIG_SYS_MONITOR_LEN)
222 #define CONFIG_ENV_IS_IN_FLASH
224 #if defined(CONFIG_FSL_ENV_IN_NAND)
225 #define CONFIG_ENV_IS_IN_NAND
226 #define CONFIG_ENV_OFFSET (1024 * 1024)
230 * CFI FLASH driver setup
232 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
233 #define CONFIG_FLASH_CFI_DRIVER
235 /* A non-standard buffered write algorithm */
236 #define CONFIG_FLASH_SPANSION_S29WS_N
237 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
238 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
241 * NAND FLASH driver setup
243 #define CONFIG_NAND_MXC
244 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
245 #define CONFIG_SYS_MAX_NAND_DEVICE 1
246 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
247 #define CONFIG_MXC_NAND_HWECC
248 #define CONFIG_SYS_NAND_LARGEPAGE
251 #define CONFIG_USB_EHCI
252 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
253 #define CONFIG_EHCI_IS_TDI
254 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
255 #define CONFIG_USB_EHCI_MXC
256 #define CONFIG_MXC_USB_PORT 0
257 #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \
258 MXC_EHCI_POWER_PINS_ENABLED | \
259 MXC_EHCI_OC_PIN_ACTIVE_LOW)
260 #define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
264 #define CONFIG_GENERIC_MMC
265 #define CONFIG_FSL_ESDHC
266 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
267 #define CONFIG_SYS_FSL_ESDHC_NUM 1
270 * Default environment and default scripts
271 * to update uboot and load kernel
274 #define CONFIG_HOSTNAME "mx35pdk"
275 #define CONFIG_EXTRA_ENV_SETTINGS \
277 "ethprime=smc911x\0" \
278 "nfsargs=setenv bootargs root=/dev/nfs rw " \
279 "nfsroot=${serverip}:${rootpath}\0" \
280 "ramargs=setenv bootargs root=/dev/ram rw\0" \
281 "addip_sta=setenv bootargs ${bootargs} " \
282 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
283 ":${hostname}:${netdev}:off panic=1\0" \
284 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
285 "addip=if test -n ${ipdyn};then run addip_dyn;" \
286 "else run addip_sta;fi\0" \
287 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
288 "addtty=setenv bootargs ${bootargs}" \
289 " console=ttymxc0,${baudrate}\0" \
290 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
291 "loadaddr=80800000\0" \
292 "kernel_addr_r=80800000\0" \
293 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
294 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
295 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \
296 "flash_self=run ramargs addip addtty addmtd addmisc;" \
297 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
298 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
299 "bootm ${kernel_addr}\0" \
300 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
301 "run nfsargs addip addtty addmtd addmisc;" \
302 "bootm ${kernel_addr_r}\0" \
303 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
304 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
305 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \
306 "load=tftp ${loadaddr} ${u-boot}\0" \
307 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
308 "update=protect off ${uboot_addr} +80000;" \
309 "erase ${uboot_addr} +80000;" \
310 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
311 "upd=if run load;then echo Updating u-boot;if run update;" \
312 "then echo U-Boot updated;" \
313 "else echo Error updating u-boot !;" \
314 "echo Board without bootloader !!;" \
316 "else echo U-Boot not downloaded..exiting;fi\0" \
317 "bootcmd=run net_nfs\0"
319 #endif /* __CONFIG_H */