2 * Copyright (C) 2004 Sascha Hauer, Pengutronix
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 #define CONFIG_ARM920T 1 /* this is an ARM920T CPU */
24 #define CONFIG_IMX 1 /* in a Motorola MC9328MXL Chip */
25 #define CONFIG_MX1FS2 1 /* on a mx1fs2 board */
26 #undef CONFIG_USE_IRQ /* don't need use IRQ/FIQ */
29 * Select serial console configuration
31 #undef _CONFIG_UART1 /* internal uart 1 */
32 #define _CONFIG_UART2 /* internal uart 2 */
33 #undef _CONFIG_UART3 /* internal uart 3 */
34 #undef _CONFIG_UART4 /* internal uart 4 */
35 #undef CONFIG_SILENT_CONSOLE /* use this to disable output */
38 * Definition of u-boot build in commands. Check out CONFIG_CMD_DFL if
39 * neccessary in include/cmd_confdefs.h file. (Un)comment for getting
40 * functionality or size of u-boot code.
42 #define CONFIG_COMMANDS (CONFIG_CMD_DFL \
45 & ~CFG_CMD_AUTOSCRIPT \
52 #include <cmd_confdefs.h>
55 * Boot options. Setting delay to -1 stops autostart count down.
57 #define CONFIG_BOOTDELAY 10
58 #define CONFIG_BOOTARGS "root=/dev/mtdblock4 console=ttySMX0,115200n8 rootfstype=jffs2"
59 #define CONFIG_BOOTCOMMAND "bootm 10080000"
60 #define CONFIG_SHOW_BOOT_PROGRESS
63 * General options for u-boot. Modify to save memory foot print
65 #define CFG_LONGHELP /* undef saves memory */
66 #define CFG_PROMPT "mx1fs2> " /* prompt string */
67 #define CFG_CBSIZE 256 /* console I/O buffer */
68 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* print buffer size */
69 #define CFG_MAXARGS 16 /* max command args */
70 #define CFG_BARGSIZE CFG_CBSIZE /* boot args buf size */
72 #define CFG_MEMTEST_START 0x08100000 /* memtest test area */
73 #define CFG_MEMTEST_END 0x08F00000
75 #undef CFG_CLKS_IN_HZ /* use HZ for freq. display */
77 #define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */
78 #define CFG_CPUSPEED 0x141 /* core clock - register value */
80 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
81 #define CONFIG_BAUDRATE 115200
83 * Definitions related to passing arguments to kernel.
85 #define CONFIG_CMDLINE_TAG 1 /* send commandline to Kernel */
86 #define CONFIG_SETUP_MEMORY_TAGS 1 /* send memory definition to kernel */
87 #define CONFIG_INITRD_TAG 1 /* send initrd params */
88 #undef CONFIG_VFD /* do not send framebuffer setup */
91 * Malloc pool need to host env + 128 Kb reserve for other allocations.
93 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + (128<<10) )
96 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
98 #define CONFIG_STACKSIZE (120<<10) /* stack size */
100 #ifdef CONFIG_USE_IRQ
101 #define CONFIG_STACKSIZE_IRQ (4<<10) /* IRQ stack */
102 #define CONFIG_STACKSIZE_FIQ (4<<10) /* FIQ stack */
105 /* SDRAM Setup Values
106 * 0x910a8300 Precharge Command CAS 3
107 * 0x910a8200 Precharge Command CAS 2
109 * 0xa10a8300 AutoRefresh Command CAS 3
110 * 0xa10a8200 Set AutoRefresh Command CAS 2
112 #define PRECHARGE_CMD 0x910a8300
113 #define AUTOREFRESH_CMD 0xa10a8300
115 #define BUS32BIT_VERSION
119 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SDRAM */
120 #define MX1FS2_SDRAM_1 0x08000000 /* SDRAM bank #1 */
121 #ifdef BUS32BIT_VERSION
122 #define MX1FS2_SDRAM_1_SIZE (0x04000000 - 0x100000) /* 64 MB - 1M Framebuffer */
124 #define MX1FS2_SDRAM_1_SIZE (0x01FC0000 - 0x100000) /* 32 MB - 1M Framebuffer */
127 * Flash Controller settings
130 #define CFG_MAX_FLASH_BANKS 1 /* FLASH banks count (not chip count)*/
131 #define CFG_MAX_FLASH_SECT 256 /* number of sector in FLASH bank */
133 #ifdef BUS32BIT_VERSION
134 #define MX1FS2_FLASH_BUS_WIDTH 4 /* we use 32 bit FLASH memory... */
135 #define MX1FS2_FLASH_INTERLEAVE 2 /* ... made of 2 chips */
136 #define MX1FS2_FLASH_BANK_SIZE 0x02000000 /* size of one flash bank*/
137 #define MX1FS2_FLASH_SECT_SIZE 0x00020000 /* size of erase sector */
139 #define MX1FS2_FLASH_BUS_WIDTH 2 /* we use 16 bit FLASH memory... */
140 #define MX1FS2_FLASH_INTERLEAVE 1 /* ... made of 1 chip */
141 #define MX1FS2_FLASH_BANK_SIZE 0x01000000 /* size of one flash bank*/
142 #define MX1FS2_FLASH_SECT_SIZE 0x00010000 /* size of erase sector */
144 #define MX1FS2_FLASH_BASE 0x10000000 /* location of flash memory */
145 #define MX1FS2_FLASH_UNLOCK 1 /* perform hw unlock first */
147 /* This should be defined if CFI FLASH device is present. Actually benefit
148 is not so clear to me. In other words we can provide more informations
149 to user, but this expects more complex flash handling we do not provide
153 #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* timeout for Erase operation */
154 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* timeout for Write operation */
156 #define CFG_FLASH_BASE MX1FS2_FLASH_BASE
159 * This is setting for JFFS2 support in u-boot.
160 * Right now there is no gain for user, but later on booting kernel might be
161 * possible. Consider using XIP kernel running from flash to save RAM
163 * NOTE: Enable CFG_CMD_JFFS2 for JFFS2 support.
169 /* No command line, one static partition, whole device */
171 #undef CONFIG_JFFS2_CMDLINE
172 #define CONFIG_JFFS2_DEV "nor0"
173 #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
174 #define CONFIG_JFFS2_PART_OFFSET 0x00050000
177 /* mtdparts command line support */
178 /* Note: fake mtd_id used, no linux mtd map file */
179 #define CONFIG_JFFS2_CMDLINE
180 #define MTDIDS_DEFAULT "nor0=mx1fs2-0"
182 #ifdef BUS32BIT_VERSION
183 #define MTDPARTS_DEFAULT "mtdparts=mx1fs2-0:2m@5m(part0),5m@9m(part1)"
185 #define MTDPARTS_DEFAULT "mtdparts=mx1fs2-0:-@320k(jffs2)"
189 * Environment setup. Definitions of monitor location and size with
190 * definition of environment setup ends up in 2 possibilities.
191 * 1. Embeded environment - in u-boot code is space for environment
192 * 2. Environment is read from predefined sector of flash
193 * Right now we support 2. possiblity, but expecting no env placed
194 * on mentioned address right now. This also needs to provide whole
195 * sector for it - for us 256Kb is really waste of memory. U-boot uses
196 * default env. and until kernel parameters could be sent to kernel
197 * env. has no sense to us.
200 #define CFG_MONITOR_BASE 0x10000000
201 #define CFG_MONITOR_LEN 0x20000 /* 128b ( 1 flash sector ) */
202 #define CFG_ENV_IS_IN_FLASH 1
203 #define CFG_ENV_ADDR 0x10020000 /* absolute address for now */
204 #define CFG_ENV_SIZE 0x20000
206 #define CONFIG_ENV_OVERWRITE 1 /* env is not writable now */
208 /* Setup CS4 and CS5 */
209 #define CFG_GIUS_A_VAL 0x0003fffe
213 * 63| x x x x | x x x x | x x x x | x x x x | x x x x | x x x x | x x x x | x x x x|32
214 * |DTACK_SEL|0|BCD | BCS | PSZ|PME|SYNC| DOL | CNC| WSC | 0| WWS | EDC |
217 * 31| x x x x | x x x x | x x x x | x x x x | x x x x | x x x x | x x x x | x x x x| 0
218 * | OEA | OEN | WEA | WEN | CSA |EBC| DSZ | 0|SP|0|WP| 0 0|PA|CSEN|
221 #define CFG_CS0U_VAL 0x00008C00
222 #define CFG_CS0L_VAL 0x22222601
223 #define CFG_CS1U_VAL 0x00008C00
224 #define CFG_CS1L_VAL 0x22222301
225 #define CFG_CS4U_VAL 0x00008C00
226 #define CFG_CS4L_VAL 0x22222301
227 #define CFG_CS5U_VAL 0x00008C00
228 #define CFG_CS5L_VAL 0x22222301
230 /* f_{dpll}=2*f{ref}*(MFI+MFN/(MFD+1))/(PD+1)
233 0x002a141f: 191,9944MHz
240 0x08001800: 64MHz mit 16er Quarz
241 0x04001800: 96MHz mit 16er Quarz
242 0x04002400: 144MHz mit 16er Quarz
244 31 |x x x x|x x x x|x x x x|x x x x|x x x x|x x x x|x x x x|x x x x| 0
245 |XXX|--PD---|-------MFD---------|XXX|--MFI--|-----MFN-----------| */
247 #define CFG_MPCTL0_VAL 0x07E723AD
248 #define CFG_MPCTL1_VAL 0x00000040
249 #define CFG_PCDR_VAL 0x00010005
250 #define CFG_GPCR_VAL 0x00000FFB
252 #define USE_16M_OSZI /* If you have one, you want to use it
253 The internal 32kHz oszillator jitters */
256 #define CFG_SPCTL0_VAL 0x04001401
257 #define CFG_SPCTL1_VAL 0x0C000040
258 #define CFG_CSCR_VAL 0x07030003
259 #define CONFIG_SYS_CLK_FREQ 16780000
260 #define CONFIG_SYSPLL_CLK_FREQ 16000000
264 #define CFG_SPCTL0_VAL 0x07E716D1
265 #define CFG_CSCR_VAL 0x06000003
266 #define CONFIG_SYS_CLK_FREQ 16780000
267 #define CONFIG_SYSPLL_CLK_FREQ 16780000
272 * Well this has to be defined, but on the other hand it is used differently
273 * one may expect. For instance loadb command do not cares :-)
274 * So advice is - do not relay on this...
276 #define CFG_LOAD_ADDR 0x08400000
278 #define CFG_FMCR_VAL 0x00000003 /* Reset Default */
280 /* Bit[0:3] contain PERCLK1DIV for UART 1
281 0x000b00b ->b<- -> 192MHz/12=16MHz
282 0x000b00b ->8<- -> 144MHz/09=16MHz
283 0x000b00b ->3<- -> 64MHz/4=16MHz */
286 #define CONFIG_IMX_SERIAL1
287 #elif defined _CONFIG_UART2
288 #define CONFIG_IMX_SERIAL2
289 #elif defined _CONFIG_UART3 | defined _CONFIG_UART4
290 #define CONFIG_IMX_SERIAL_NONE
292 #define CFG_NS16550_SERIAL
293 #define CFG_NS16550_CLK 3686400
294 #define CFG_NS16550_REG_SIZE 1
295 #define CONFIG_CONS_INDEX 1
297 #define CFG_NS16550_COM1 0x15000000
298 #elif defined _CONFIG_UART4
299 #define CFG_NS16550_COM1 0x16000000
303 #endif /* __CONFIG_H */