include/configs/mt7628.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (C) 2020 MediaTek Inc.
   4  *
   5  * Author: Weijie Gao <weijie.gao@mediatek.com>
   6  */
   7
   8 #ifndef __CONFIG_MT7628_H
   9 #define __CONFIG_MT7628_H
  10
  11 #define CONFIG_SYS_MIPS_TIMER_FREQ      290000000
  12
  13 #define CONFIG_SYS_BOOTPARAMS_LEN       0x20000
  14
  15 #define CONFIG_SYS_SDRAM_BASE           0x80000000
  16
  17 #define CONFIG_SYS_INIT_SP_OFFSET       0x80000
  18
  19 #define CONFIG_SYS_BOOTM_LEN            0x1000000
  20
  21 #define CONFIG_SYS_CBSIZE               1024
  22
  23 /* Serial SPL */
  24 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
  25 #define CONFIG_SYS_NS16550_MEM32
  26 #define CONFIG_SYS_NS16550_CLK          40000000
  27 #define CONFIG_SYS_NS16550_REG_SIZE     -4
  28 #define CONFIG_SYS_NS16550_COM1         0xb0000c00
  29 #endif
  30
  31 /* Serial common */
  32 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, \
  33                                           230400, 460800, 921600 }
  34
  35 /* SPL */
  36
  37 #define CONFIG_SYS_UBOOT_START          CONFIG_SYS_TEXT_BASE
  38 #define CONFIG_SPL_BSS_START_ADDR       0x80010000
  39 #define CONFIG_SPL_BSS_MAX_SIZE         0x10000
  40 #define CONFIG_SPL_MAX_SIZE             0x10000
  41 #define CONFIG_SPL_PAD_TO               0
  42
  43 /* Dummy value */
  44 #define CONFIG_SYS_UBOOT_BASE           0
  45
  46 #endif /* __CONFIG_MT7628_H */