1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the Hitachi Solution Engine 7722
5 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
11 #define CONFIG_CPU_SH7722 1
13 #define CONFIG_DISPLAY_BOARDINFO
14 #undef CONFIG_SHOW_BOOT_PROGRESS
17 #define CONFIG_SMC91111
18 #define CONFIG_SMC91111_BASE (0xB8000000)
21 #define MS7722SE_SDRAM_BASE (0x8C000000)
22 #define MS7722SE_FLASH_BASE_1 (0xA0000000)
23 #define MS7722SE_FLASH_BANK_SIZE (8*1024 * 1024)
25 #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
26 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
29 #define CONFIG_CONS_SCIF0 1
31 #define CONFIG_SYS_MEMTEST_START (MS7722SE_SDRAM_BASE)
32 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
34 #undef CONFIG_SYS_MEMTEST_SCRATCH /* Scratch address used by the alternate memory test */
36 #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* Enable temporary baudrate change while serial download */
38 #define CONFIG_SYS_SDRAM_BASE (MS7722SE_SDRAM_BASE)
39 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* maybe more, but if so u-boot doesn't know about it... */
41 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) /* default load address for scripts ?!? */
43 #define CONFIG_SYS_MONITOR_BASE (MS7722SE_FLASH_BASE_1) /* Address of u-boot image
44 in Flash (NOT run time address in SDRAM) ?!? */
45 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* */
46 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */
47 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
50 #undef CONFIG_SYS_FLASH_QUIET_TEST
51 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
53 #define CONFIG_SYS_FLASH_BASE (MS7722SE_FLASH_BASE_1) /* Physical start address of Flash memory */
55 #define CONFIG_SYS_MAX_FLASH_SECT 150 /* Max number of sectors on each
58 /* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */
59 #define CONFIG_SYS_MAX_FLASH_BANKS 2
60 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MS7722SE_FLASH_BANK_SIZE), \
61 CONFIG_SYS_FLASH_BASE + (1 * MS7722SE_FLASH_BANK_SIZE), \
64 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) /* Timeout for Flash erase operations (in ms) */
65 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) /* Timeout for Flash write operations (in ms) */
66 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) /* Timeout for Flash set sector lock bit operations (in ms) */
67 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Timeout for Flash clear lock bit operations (in ms) */
69 #undef CONFIG_SYS_DIRECT_FLASH_TFTP
71 #define CONFIG_ENV_OVERWRITE 1
72 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
73 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
74 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
75 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
76 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
77 #define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
80 #define CONFIG_SYS_CLK_FREQ 33333333
81 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
83 #endif /* __MS7722SE_H */