2 * (C) Copyright 2003-2007
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * Based on PRO Motion board config file by Andy Joseph, andy@promessdev.com
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * High Level Configuration Options
34 #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
35 #define CONFIG_MPC5200 1 /* More exactly a MPC5200 */
36 #define CONFIG_MOTIONPRO 1 /* ... on Promess Motion-PRO board */
42 #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
58 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
59 #include <cmd_confdefs.h>
63 * Serial console configuration
65 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
66 #define CONFIG_NETCONSOLE 1 /* network console */
67 #define CONFIG_BAUDRATE 115200
68 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
72 * Ethernet configuration
74 #define CONFIG_MPC5xxx_FEC 1
75 #define CONFIG_PHY_ADDR 0x2
76 #define CONFIG_PHY_TYPE 0x79c874
82 #define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
83 #define CONFIG_AUTOBOOT_KEYED
84 #define CONFIG_AUTOBOOT_STOP_STR "\x1b\x1b"
85 #define DEBUG_BOOTKEYS 0
86 #undef CONFIG_AUTOBOOT_DELAY_STR
87 #undef CONFIG_BOOTARGS
88 #define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \
89 "press \"<Esc><Esc>\" to stop\n"
91 #define CONFIG_ETHADDR 00:50:C2:40:10:00
92 #define CONFIG_OVERWRITE_ETHADDR_ONCE 1
93 #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
97 * Default environment settings
99 #define CONFIG_EXTRA_ENV_SETTINGS \
101 "hostname=motionpro\0" \
102 "netmask=255.255.0.0\0" \
103 "ipaddr=192.168.160.22\0" \
104 "serverip=192.168.1.1\0" \
105 "gatewayip=192.168.1.1\0" \
106 "console=ttyPSC0,115200\0" \
107 "u-boot_addr=100000\0" \
108 "kernel_addr=200000\0" \
109 "fdt_addr=400000\0" \
110 "ramdisk_addr=500000\0" \
111 "multi_image_addr=800000\0" \
112 "rootpath=/opt/eldk-4.1/ppc_6xx\0" \
113 "u-boot=/tftpboot/motionpro/u-boot.bin\0" \
114 "bootfile=/tftpboot/motionpro/uImage\0" \
115 "fdt_file=/tftpboot/motionpro/motionpro.dtb\0" \
116 "ramdisk_file=/tftpboot/motionpro/uRamdisk\0" \
117 "multi_image_file=kernel+initrd+dtb.img\0" \
118 "load=tftp $(u-boot_addr) $(u-boot)\0" \
119 "update=prot off fff00000 fff3ffff; era fff00000 fff3ffff; " \
120 "cp.b $(u-boot_addr) fff00000 $(filesize);" \
121 "prot on fff00000 fff3ffff\0" \
122 "ramargs=setenv bootargs root=/dev/ram rw\0" \
123 "nfsargs=setenv bootargs root=/dev/nfs rw " \
124 "nfsroot=$(serverip):$(rootpath)\0" \
125 "fat_args=setenv bootargs rw\0" \
126 "addip=setenv bootargs $(bootargs) " \
127 "ip=$(ipaddr):$(serverip):$(gatewayip):" \
128 "$(netmask):$(hostname):$(netdev):off panic=1 " \
129 "console=$(console)\0" \
130 "net_nfs=tftp $(kernel_addr) $(bootfile); " \
131 "tftp $(fdt_addr) $(fdt_file); run nfsargs addip; " \
132 "bootm $(kernel_addr) - $(fdt_addr)\0" \
133 "net_self=tftp $(kernel_addr) $(bootfile); " \
134 "tftp $(fdt_addr) $(fdt_file); " \
135 "tftp $(ramdisk_addr) $(ramdisk_file); " \
136 "run ramargs addip; " \
137 "bootm $(kernel_addr) $(ramdisk_addr) $(fdt_addr)\0" \
138 "fat_multi=run fat_args addip; fatload ide 0:1 " \
139 "${multi_image_addr} ${multi_image_file}; " \
140 "bootm ${multi_image_addr}\0" \
142 #define CONFIG_BOOTCOMMAND "run net_nfs"
145 * do board-specific init
147 #define CONFIG_BOARD_EARLY_INIT_R 1
151 * Low level configuration
156 * Clock configuration: SYS_XTALIN = 25MHz
158 #define CFG_MPC5XXX_CLKIN 25000000
162 * Set IPB speed to 100MHz (yes, the #define is misnamed)
164 #define CFG_IPBSPEED_133
171 * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000.
172 * Setting MBAR to otherwise will cause system hang when using SmartDMA such
173 * as network commands.
175 #define CFG_MBAR 0xf0000000
176 #define CFG_SDRAM_BASE 0x00000000
179 * If building for running out of SDRAM, then MBAR has been set up beforehand
180 * (e.g., by the BDI). Otherwise we must specify the default boot-up value of
181 * MBAR, as given in the doccumentation.
183 #if TEXT_BASE == 0x00100000
184 #define CFG_DEFAULT_MBAR 0xf0000000
185 #else /* TEXT_BASE != 0x00100000 */
186 #define CFG_DEFAULT_MBAR 0x80000000
187 #define CFG_LOWBOOT 1
188 #endif /* TEXT_BASE == 0x00100000 */
190 /* Use SRAM until RAM will be available */
191 #define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
192 #define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
194 #define CFG_GBL_DATA_SIZE 128 /* size in bytes for initial data */
195 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
196 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
198 #define CFG_MONITOR_BASE TEXT_BASE
199 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
200 #define CFG_RAMBOOT 1
203 #define CFG_MONITOR_LEN (256 << 10) /* 256 kB for Monitor */
204 #define CFG_MALLOC_LEN (128 << 10) /* 128 kB for malloc() */
205 #define CFG_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */
209 * Chip selects configuration
211 /* Boot Chipselect */
212 #define CFG_BOOTCS_START CFG_FLASH_BASE
213 #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
214 #define CFG_BOOTCS_CFG 0x03035D00
216 /* Flash memory addressing */
217 #define CFG_CS0_START CFG_FLASH_BASE
218 #define CFG_CS0_SIZE CFG_FLASH_SIZE
219 #define CFG_CS0_CFG CFG_BOOTCS_CFG
221 /* Dual Port SRAM -- Kollmorgen Drive memory addressing */
222 #define CFG_CS1_START 0x50000000
223 #define CFG_CS1_SIZE 0x10000
224 #define CFG_CS1_CFG 0x05055800
226 /* Local register access */
227 #define CFG_CS2_START 0x50010000
228 #define CFG_CS2_SIZE 0x10000
229 #define CFG_CS2_CFG 0x05055800
231 /* Anybus CompactCom Module memory addressing */
232 #define CFG_CS3_START 0x50020000
233 #define CFG_CS3_SIZE 0x10000
234 #define CFG_CS3_CFG 0x05055800
236 /* No burst and dead cycle = 2 for all CSs */
237 #define CFG_CS_BURST 0x00000000
238 #define CFG_CS_DEADCYCLE 0x22222222
242 * SDRAM configuration
244 /* 2 x MT48LC16M16A2BG-75 IT:D, CASL 2, 32 bit data bus */
245 #define SDRAM_CONFIG1 0x52222600
246 #define SDRAM_CONFIG2 0x88b70000
247 #define SDRAM_CONTROL 0x50570000
248 #define SDRAM_MODE 0x008d0000
252 * Flash configuration
254 #define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
255 #define CFG_FLASH_CFI_DRIVER 1
256 #define CFG_FLASH_BASE 0xff000000
257 #define CFG_FLASH_SIZE 0x01000000
258 #define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */
259 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
260 #define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */
261 #define CONFIG_FLASH_16BIT /* Flash is 16-bit */
265 * IDE/ATA configuration
267 #define CFG_ATA_BASE_ADDR MPC5XXX_ATA
268 #define CFG_IDE_MAXBUS 1
269 #define CFG_IDE_MAXDEVICE 1
270 #define CONFIG_IDE_PREINIT
272 #define CFG_ATA_DATA_OFFSET 0x0060
273 #define CFG_ATA_REG_OFFSET CFG_ATA_DATA_OFFSET
274 #define CFG_ATA_STRIDE 4
275 #define CONFIG_DOS_PARTITION
281 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
282 #define CFG_I2C_MODULE 2 /* select I2C module #2 */
283 #define CFG_I2C_SPEED 100000 /* 100 kHz */
284 #define CFG_I2C_SLAVE 0x7F
288 * EEPROM configuration
290 #define CFG_I2C_EEPROM_ADDR_LEN 1
291 #define CFG_EEPROM_PAGE_WRITE_BITS 3
292 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 70
293 #define CFG_I2C_MULTI_EEPROMS 1 /* 2 EEPROMs (addr:50,52) */
299 #define CONFIG_RTC_DS1337 1
300 #define CFG_I2C_RTC_ADDR 0x68
304 * Environment settings
306 #define CFG_ENV_IS_IN_FLASH 1
307 /* This has to be a multiple of the Flash sector size */
308 #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
309 #define CFG_ENV_SIZE 0x1000
310 #define CFG_ENV_SECT_SIZE 0x10000
314 * Pin multiplexing configuration
318 * PSC2: GPIO (default)
319 * PSC3: GPIO (default)
321 * Ethernet: Ethernet 100Mbit with MD
323 * PSC6/IRDA: GPIO (default)
325 #define CFG_GPS_PORT_CONFIG 0x1105a004
329 * Miscellaneous configurable options
331 #define CFG_LONGHELP /* undef to save memory */
332 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
333 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
334 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
335 #define CFG_MAXARGS 16 /* max number of command args */
336 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
338 #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
339 #define CFG_MEMTEST_END 0x03f00000 /* 1 ... 64 MiB in DRAM */
341 #define CFG_LOAD_ADDR 0x200000 /* default kernel load addr */
343 #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
347 * Various low-level settings
349 #define CFG_HID0_INIT HID0_ICE | HID0_ICFI
350 #define CFG_HID0_FINAL HID0_ICE
352 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
353 #define BOOTFLAG_WARM 0x02 /* Software reboot */
355 #define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
358 /* Not needed for MPC 5xxx U-Boot, but used by tools/updater */
359 #define CFG_RESET_ADDRESS 0xfff00100
361 /* pass open firmware flat tree */
362 #define CONFIG_OF_FLAT_TREE 1
363 #define CONFIG_OF_BOARD_SETUP 1
365 /* maximum size of the flat tree (8K) */
366 #define OF_FLAT_TREE_MAX_SIZE 8192
367 #define OF_CPU "PowerPC,5200@0"
368 #define OF_SOC "soc5200@f0000000"
369 #define OF_TBCLK (bd->bi_busfreq / 4)
370 #define OF_STDOUT_PAT "/soc5200@f0000000/serial@2000"
372 #endif /* __CONFIG_H */