2 * (C) Copyright 2003-2007
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * Based on Motion-PRO board config file by Robert McCullough, rob@promessinc.com
7 * SPDX-License-Identifier: GPL-2.0+
14 * High Level Configuration Options
18 #define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */
19 #define CONFIG_MOTIONPRO 1 /* ... on Promess Motion-PRO board */
21 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
23 #define CONFIG_SYS_TEXT_BASE 0xfff00000
28 #define CONFIG_BOOTP_BOOTFILESIZE
29 #define CONFIG_BOOTP_BOOTPATH
30 #define CONFIG_BOOTP_GATEWAY
31 #define CONFIG_BOOTP_HOSTNAME
34 * Command line configuration.
36 #define CONFIG_CMD_BEDBUG
37 #define CONFIG_CMD_DATE
38 #define CONFIG_CMD_DTT
39 #define CONFIG_CMD_EEPROM
40 #define CONFIG_CMD_IDE
41 #define CONFIG_CMD_IMMAP
42 #define CONFIG_CMD_JFFS2
43 #define CONFIG_CMD_REGINFO
46 * Serial console configuration
48 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
49 #define CONFIG_NETCONSOLE 1 /* network console */
50 #define CONFIG_BAUDRATE 115200
51 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
54 * Ethernet configuration
56 #define CONFIG_MPC5xxx_FEC 1
57 #define CONFIG_MPC5xxx_FEC_MII100
58 #define CONFIG_PHY_ADDR 0x2
59 #define CONFIG_PHY_TYPE 0x79c874
60 #define CONFIG_RESET_PHY_R 1
65 #undef CONFIG_BOOTARGS
67 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
70 * Default environment settings
72 #define CONFIG_EXTRA_ENV_SETTINGS \
74 "hostname=motionpro\0" \
75 "netmask=255.255.255.0\0" \
76 "ipaddr=192.168.1.106\0" \
77 "serverip=192.168.1.100\0" \
78 "gatewayip=192.168.1.100\0" \
79 "console=ttyPSC0,115200\0" \
80 "u-boot_addr=400000\0" \
81 "kernel_addr=400000\0" \
83 "ramdisk_addr=800000\0" \
84 "multi_image_addr=800000\0" \
85 "rootpath=/opt/eldk-4.2/ppc_6xx\0" \
86 "u-boot=/tftpboot/motionpro/u-boot.bin\0" \
87 "bootfile=/tftpboot/motionpro/uImage\0" \
88 "fdt_file=/tftpboot/motionpro/motionpro.dtb\0" \
89 "ramdisk_file=/tftpboot/motionpro/uRamdisk\0" \
90 "multi_image_file=kernel+initrd+dtb.img\0" \
91 "load=tftp ${u-boot_addr} ${u-boot}\0" \
92 "update=prot off fff00000 +${filesize};" \
93 "era fff00000 +${filesize}; " \
94 "cp.b ${u-boot_addr} fff00000 ${filesize};" \
95 "prot on fff00000 +${filesize}\0" \
96 "ramargs=setenv bootargs root=/dev/ram rw\0" \
97 "nfsargs=setenv bootargs root=/dev/nfs rw " \
98 "nfsroot=${serverip}:${rootpath}\0" \
99 "fat_args=setenv bootargs root=/dev/sda rw\0" \
100 "mtdids=nor0=ff000000.flash\0" \
101 "mtdparts=ff000000.flash:13m(fs),2m(kernel),384k(uboot)," \
102 "128k(env),128k(redund_env)," \
103 "128k(dtb),128k(user_data)\0" \
104 "addcons=setenv bootargs ${bootargs} console=${console}\0" \
105 "addmtd=setenv bootargs ${bootargs} mtdparts=${mtdparts}\0" \
106 "addip=setenv bootargs ${bootargs} " \
107 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
108 "${netmask}:${hostname}:${netdev}:off panic=1 " \
109 "console=${console}\0" \
110 "net_nfs=tftp ${kernel_addr} ${bootfile}; " \
111 "tftp ${fdt_addr} ${fdt_file}; " \
112 "run nfsargs addip addmtd; " \
113 "bootm ${kernel_addr} - ${fdt_addr}\0" \
114 "net_self=tftp ${kernel_addr} ${bootfile}; " \
115 "tftp ${fdt_addr} ${fdt_file}; " \
116 "tftp ${ramdisk_addr} ${ramdisk_file}; " \
117 "nfs ${ramdisk_addr} ${serverip}:${rootpath}/images/uRamdisk; " \
118 "run ramargs addip addcons addmtd; " \
119 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
120 "fat_multi=run fat_args addip addmtd; fatload ide 0:1 " \
121 "${multi_image_addr} ${multi_image_file}; " \
122 "bootm ${multi_image_addr}\0" \
124 #define CONFIG_BOOTCOMMAND "run fat_multi"
127 * do board-specific init
129 #define CONFIG_BOARD_EARLY_INIT_R 1
132 * Low level configuration
136 * Clock configuration: SYS_XTALIN = 33MHz
138 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000
141 * Set IPB speed to 100MHz
143 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK
149 * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000.
150 * Setting MBAR to otherwise will cause system hang when using SmartDMA such
151 * as network commands.
153 #define CONFIG_SYS_MBAR 0xf0000000
154 #define CONFIG_SYS_SDRAM_BASE 0x00000000
157 * If building for running out of SDRAM, then MBAR has been set up beforehand
158 * (e.g., by the BDI). Otherwise we must specify the default boot-up value of
159 * MBAR, as given in the doccumentation.
161 #if CONFIG_SYS_TEXT_BASE == 0x00100000
162 #define CONFIG_SYS_DEFAULT_MBAR 0xf0000000
163 #else /* CONFIG_SYS_TEXT_BASE != 0x00100000 */
164 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
165 #define CONFIG_SYS_LOWBOOT 1
166 #endif /* CONFIG_SYS_TEXT_BASE == 0x00100000 */
168 /* Use SRAM until RAM will be available */
169 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
170 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
172 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
173 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
175 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
176 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
177 #define CONFIG_SYS_RAMBOOT 1
180 #define CONFIG_SYS_MONITOR_LEN (384 << 10) /* 384 kB for Monitor */
181 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* 1 MiB for malloc() */
182 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */
185 * Chip selects configuration
187 /* Boot Chipselect */
188 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
189 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
190 #define CONFIG_SYS_BOOTCS_CFG 0x00045D00
192 /* Flash memory addressing */
193 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
194 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
195 #define CONFIG_SYS_CS0_CFG CONFIG_SYS_BOOTCS_CFG
197 /* Dual Port SRAM -- Kollmorgen Drive memory addressing */
198 #define CONFIG_SYS_CS1_START 0x50000000
199 #define CONFIG_SYS_CS1_SIZE 0x10000
200 #define CONFIG_SYS_CS1_CFG 0x05055800
202 /* Local register access */
203 #define CONFIG_SYS_CS2_START 0x50010000
204 #define CONFIG_SYS_CS2_SIZE 0x10000
205 #define CONFIG_SYS_CS2_CFG 0x05055800
207 /* Anybus CompactCom Module memory addressing */
208 #define CONFIG_SYS_CS3_START 0x50020000
209 #define CONFIG_SYS_CS3_SIZE 0x10000
210 #define CONFIG_SYS_CS3_CFG 0x05055800
212 /* No burst and dead cycle = 2 for all CSs */
213 #define CONFIG_SYS_CS_BURST 0x00000000
214 #define CONFIG_SYS_CS_DEADCYCLE 0x22222222
217 * SDRAM configuration
219 /* 2 x MT48LC16M16A2BG-75 IT:D, CASL 3, 32 bit data bus */
220 #define SDRAM_CONFIG1 0x62322900
221 #define SDRAM_CONFIG2 0x88c70000
222 #define SDRAM_CONTROL 0x504f0000
223 #define SDRAM_MODE 0x00cd0000
226 * Flash configuration
228 #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
229 #define CONFIG_FLASH_CFI_DRIVER 1
230 #define CONFIG_SYS_FLASH_BASE 0xff000000
231 #define CONFIG_SYS_FLASH_SIZE 0x01000000
232 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
233 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
234 #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
235 #define CONFIG_FLASH_16BIT /* Flash is 16-bit */
240 #define CONFIG_CMD_MTDPARTS
241 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
242 #define CONFIG_FLASH_CFI_MTD
243 #define MTDIDS_DEFAULT "nor0=motionpro-0"
244 #define MTDPARTS_DEFAULT "mtdparts=motionpro-0:" \
245 "13m(fs),2m(kernel),384k(uboot)," \
246 "128k(env),128k(redund_env)," \
247 "128k(dtb),-(user_data)"
250 * IDE/ATA configuration
252 #define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
253 #define CONFIG_SYS_IDE_MAXBUS 1
254 #define CONFIG_SYS_IDE_MAXDEVICE 1
255 #define CONFIG_IDE_PREINIT
257 #define CONFIG_SYS_ATA_DATA_OFFSET 0x0060
258 #define CONFIG_SYS_ATA_REG_OFFSET CONFIG_SYS_ATA_DATA_OFFSET
259 #define CONFIG_SYS_ATA_STRIDE 4
260 #define CONFIG_DOS_PARTITION
265 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
266 #define CONFIG_SYS_I2C_MODULE 2 /* select I2C module #2 */
267 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
268 #define CONFIG_SYS_I2C_SLAVE 0x7F
271 * EEPROM configuration
273 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
274 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 1 /* 2 bytes per write cycle */
275 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 /* 2ms/cycle + 3ms extra */
280 #define CONFIG_RTC_DS1337 1
281 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
284 * Status LED configuration
286 #define CONFIG_STATUS_LED /* Status LED enabled */
287 #define CONFIG_BOARD_SPECIFIC_LED
289 #define ENABLE_GPIO_OUT 0x00000024
290 #define LED_ON 0x00000010
294 * In case of Motion-PRO, a LED is identified by its corresponding
295 * GPT Enable and Mode Select Register.
297 typedef volatile unsigned long * led_id_t;
299 extern void __led_init(led_id_t id, int state);
300 extern void __led_toggle(led_id_t id);
301 extern void __led_set(led_id_t id, int state);
302 #endif /* __ASSEMBLY__ */
307 #define CONFIG_DTT_LM75 1
308 #define CONFIG_DTT_SENSORS { 0x49 }
311 * Environment settings
313 #define CONFIG_ENV_IS_IN_FLASH 1
314 /* This has to be a multiple of the Flash sector size */
315 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
316 #define CONFIG_ENV_SIZE 0x1000
317 #define CONFIG_ENV_SECT_SIZE 0x20000
319 /* Configuration of redundant environment */
320 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
321 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
324 * Pin multiplexing configuration
328 * PSC2: GPIO (default)
329 * PSC3: GPIO (default)
331 * Ethernet: Ethernet 100Mbit with MD
333 * PSC6/IRDA: GPIO (default)
335 #define CONFIG_SYS_GPS_PORT_CONFIG 0x1105a004
338 * Motion-PRO's CPLD revision control register
340 #define CPLD_REV_REGISTER (CONFIG_SYS_CS2_START + 0x06)
343 * Miscellaneous configurable options
345 #define CONFIG_SYS_LONGHELP /* undef to save memory */
346 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
347 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
348 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
349 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
351 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
352 #define CONFIG_SYS_MEMTEST_END 0x03e00000 /* 1 ... 62 MiB in DRAM */
353 #define CONFIG_SYS_ALT_MEMTEST
355 #define CONFIG_SYS_LOAD_ADDR 0x200000 /* default kernel load addr */
358 * Various low-level settings
360 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
361 #define CONFIG_SYS_HID0_FINAL HID0_ICE
363 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
365 /* Not needed for MPC 5xxx U-Boot, but used by tools/updater */
366 #define CONFIG_SYS_RESET_ADDRESS 0xfff00100
368 #define OF_CPU "PowerPC,5200@0"
369 #define OF_SOC "soc5200@f0000000"
370 #define OF_TBCLK (bd->bi_busfreq / 4)
371 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
373 #endif /* __CONFIG_H */