2 * (C) Copyright 2003-2007
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * Based on PRO Motion board config file by Andy Joseph, andy@promessdev.com
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * High Level Configuration Options
34 #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
35 #define CONFIG_MPC5200 1 /* More exactly a MPC5200 */
36 #define CONFIG_MOTIONPRO 1 /* ... on Promess Motion-PRO board */
38 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
43 #define CONFIG_BOOTP_BOOTFILESIZE
44 #define CONFIG_BOOTP_BOOTPATH
45 #define CONFIG_BOOTP_GATEWAY
46 #define CONFIG_BOOTP_HOSTNAME
50 * Command line configuration.
52 #include <config_cmd_default.h>
54 #define CONFIG_CMD_ASKENV
55 #define CONFIG_CMD_DHCP
56 #define CONFIG_CMD_REGINFO
57 #define CONFIG_CMD_IMMAP
58 #define CONFIG_CMD_ELF
59 #define CONFIG_CMD_MII
60 #define CONFIG_CMD_BEDBUG
61 #define CONFIG_CMD_NET
62 #define CONFIG_CMD_PING
63 #define CONFIG_CMD_IDE
64 #define CONFIG_CMD_FAT
65 #define CONFIG_CMD_JFFS2
66 #define CONFIG_CMD_I2C
67 #define CONFIG_CMD_DATE
68 #define CONFIG_CMD_EEPROM
69 #define CONFIG_CMD_DTT
73 * Serial console configuration
75 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
76 #define CONFIG_NETCONSOLE 1 /* network console */
77 #define CONFIG_BAUDRATE 115200
78 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
82 * Ethernet configuration
84 #define CONFIG_MPC5xxx_FEC 1
85 #define CONFIG_PHY_ADDR 0x2
86 #define CONFIG_PHY_TYPE 0x79c874
87 #define CONFIG_RESET_PHY_R 1
92 #define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
93 #define CONFIG_AUTOBOOT_KEYED
94 #define CONFIG_AUTOBOOT_STOP_STR "\x1b\x1b"
95 #define DEBUG_BOOTKEYS 0
96 #undef CONFIG_AUTOBOOT_DELAY_STR
97 #undef CONFIG_BOOTARGS
98 #define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \
99 "press \"<Esc><Esc>\" to stop\n", bootdelay
101 #define CONFIG_ETHADDR 00:50:C2:40:10:00
102 #define CONFIG_OVERWRITE_ETHADDR_ONCE 1
103 #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
107 * Default environment settings
109 #define CONFIG_EXTRA_ENV_SETTINGS \
111 "hostname=motionpro\0" \
112 "netmask=255.255.0.0\0" \
113 "ipaddr=192.168.160.22\0" \
114 "serverip=192.168.1.1\0" \
115 "gatewayip=192.168.1.1\0" \
116 "console=ttyPSC0,115200\0" \
117 "u-boot_addr=100000\0" \
118 "kernel_addr=200000\0" \
119 "fdt_addr=400000\0" \
120 "ramdisk_addr=500000\0" \
121 "multi_image_addr=800000\0" \
122 "rootpath=/opt/eldk-4.1/ppc_6xx\0" \
123 "u-boot=/tftpboot/motionpro/u-boot.bin\0" \
124 "bootfile=/tftpboot/motionpro/uImage\0" \
125 "fdt_file=/tftpboot/motionpro/motionpro.dtb\0" \
126 "ramdisk_file=/tftpboot/motionpro/uRamdisk\0" \
127 "multi_image_file=kernel+initrd+dtb.img\0" \
128 "load=tftp ${u-boot_addr} ${u-boot}\0" \
129 "update=prot off fff00000 fff3ffff; era fff00000 fff3ffff; " \
130 "cp.b ${u-boot_addr} fff00000 ${filesize};" \
131 "prot on fff00000 fff3ffff\0" \
132 "ramargs=setenv bootargs root=/dev/ram rw\0" \
133 "nfsargs=setenv bootargs root=/dev/nfs rw " \
134 "nfsroot=${serverip}:${rootpath}\0" \
135 "fat_args=setenv bootargs rw\0" \
136 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
137 "addip=setenv bootargs ${bootargs} " \
138 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
139 "${netmask}:${hostname}:${netdev}:off panic=1 " \
140 "console=${console}\0" \
141 "net_nfs=tftp ${kernel_addr} ${bootfile}; " \
142 "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip; " \
143 "bootm ${kernel_addr} - ${fdt_addr}\0" \
144 "net_self=tftp ${kernel_addr} ${bootfile}; " \
145 "tftp ${fdt_addr} ${fdt_file}; " \
146 "tftp ${ramdisk_addr} ${ramdisk_file}; " \
147 "run ramargs addip; " \
148 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
149 "fat_multi=run fat_args addip; fatload ide 0:1 " \
150 "${multi_image_addr} ${multi_image_file}; " \
151 "bootm ${multi_image_addr}\0" \
153 #define CONFIG_BOOTCOMMAND "run net_nfs"
156 * do board-specific init
158 #define CONFIG_BOARD_EARLY_INIT_R 1
162 * Low level configuration
167 * Clock configuration: SYS_XTALIN = 33MHz
169 #define CFG_MPC5XXX_CLKIN 33000000
173 * Set IPB speed to 100MHz
175 #define CFG_IPBCLK_EQUALS_XLBCLK
182 * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000.
183 * Setting MBAR to otherwise will cause system hang when using SmartDMA such
184 * as network commands.
186 #define CFG_MBAR 0xf0000000
187 #define CFG_SDRAM_BASE 0x00000000
190 * If building for running out of SDRAM, then MBAR has been set up beforehand
191 * (e.g., by the BDI). Otherwise we must specify the default boot-up value of
192 * MBAR, as given in the doccumentation.
194 #if TEXT_BASE == 0x00100000
195 #define CFG_DEFAULT_MBAR 0xf0000000
196 #else /* TEXT_BASE != 0x00100000 */
197 #define CFG_DEFAULT_MBAR 0x80000000
198 #define CFG_LOWBOOT 1
199 #endif /* TEXT_BASE == 0x00100000 */
201 /* Use SRAM until RAM will be available */
202 #define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
203 #define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
205 #define CFG_GBL_DATA_SIZE 128 /* size in bytes for initial data */
206 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
207 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
209 #define CFG_MONITOR_BASE TEXT_BASE
210 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
211 #define CFG_RAMBOOT 1
214 #define CFG_MONITOR_LEN (256 << 10) /* 256 kB for Monitor */
215 #define CFG_MALLOC_LEN (1024 << 10) /* 1 MiB for malloc() */
216 #define CFG_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */
220 * Chip selects configuration
222 /* Boot Chipselect */
223 #define CFG_BOOTCS_START CFG_FLASH_BASE
224 #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
225 #define CFG_BOOTCS_CFG 0x00045D00
227 /* Flash memory addressing */
228 #define CFG_CS0_START CFG_FLASH_BASE
229 #define CFG_CS0_SIZE CFG_FLASH_SIZE
230 #define CFG_CS0_CFG CFG_BOOTCS_CFG
232 /* Dual Port SRAM -- Kollmorgen Drive memory addressing */
233 #define CFG_CS1_START 0x50000000
234 #define CFG_CS1_SIZE 0x10000
235 #define CFG_CS1_CFG 0x05055800
237 /* Local register access */
238 #define CFG_CS2_START 0x50010000
239 #define CFG_CS2_SIZE 0x10000
240 #define CFG_CS2_CFG 0x05055800
242 /* Anybus CompactCom Module memory addressing */
243 #define CFG_CS3_START 0x50020000
244 #define CFG_CS3_SIZE 0x10000
245 #define CFG_CS3_CFG 0x05055800
247 /* No burst and dead cycle = 2 for all CSs */
248 #define CFG_CS_BURST 0x00000000
249 #define CFG_CS_DEADCYCLE 0x22222222
253 * SDRAM configuration
255 /* 2 x MT48LC16M16A2BG-75 IT:D, CASL 3, 32 bit data bus */
256 #define SDRAM_CONFIG1 0x62322900
257 #define SDRAM_CONFIG2 0x88c70000
258 #define SDRAM_CONTROL 0x504f0000
259 #define SDRAM_MODE 0x00cd0000
263 * Flash configuration
265 #define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
266 #define CONFIG_FLASH_CFI_DRIVER 1
267 #define CFG_FLASH_BASE 0xff000000
268 #define CFG_FLASH_SIZE 0x01000000
269 #define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */
270 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
271 #define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */
272 #define CONFIG_FLASH_16BIT /* Flash is 16-bit */
277 #define CONFIG_JFFS2_CMDLINE
278 #define MTDIDS_DEFAULT "nor0=motionpro-0"
279 #define MTDPARTS_DEFAULT "mtdparts=motionpro-0:" \
280 "13m(fs),2m(kernel),256k(uboot)," \
281 "128k(env),128k(redund_env)," \
282 "128k(dtb),-(user_data)"
285 * IDE/ATA configuration
287 #define CFG_ATA_BASE_ADDR MPC5XXX_ATA
288 #define CFG_IDE_MAXBUS 1
289 #define CFG_IDE_MAXDEVICE 1
290 #define CONFIG_IDE_PREINIT
292 #define CFG_ATA_DATA_OFFSET 0x0060
293 #define CFG_ATA_REG_OFFSET CFG_ATA_DATA_OFFSET
294 #define CFG_ATA_STRIDE 4
295 #define CONFIG_DOS_PARTITION
301 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
302 #define CFG_I2C_MODULE 2 /* select I2C module #2 */
303 #define CFG_I2C_SPEED 100000 /* 100 kHz */
304 #define CFG_I2C_SLAVE 0x7F
308 * EEPROM configuration
310 #define CFG_I2C_EEPROM_ADDR_LEN 1
311 #define CFG_EEPROM_PAGE_WRITE_ENABLE 1 /* DTT driver needs this */
312 #define CFG_EEPROM_PAGE_WRITE_BITS 1 /* 2 bytes per write cycle */
313 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 5 /* 2ms/cycle + 3ms extra */
314 #define CFG_I2C_MULTI_EEPROMS 1 /* 2 EEPROMs (addr:50,52) */
320 #define CONFIG_RTC_DS1337 1
321 #define CFG_I2C_RTC_ADDR 0x68
325 * Status LED configuration
327 #define CONFIG_STATUS_LED /* Status LED enabled */
328 #define CONFIG_BOARD_SPECIFIC_LED
330 #define ENABLE_GPIO_OUT 0x00000024
331 #define LED_ON 0x00000010
335 * In case of Motion-PRO, a LED is identified by its corresponding
336 * GPT Enable and Mode Select Register.
338 typedef volatile unsigned long * led_id_t;
340 extern void __led_init(led_id_t id, int state);
341 extern void __led_toggle(led_id_t id);
342 extern void __led_set(led_id_t id, int state);
343 #endif /* __ASSEMBLY__ */
349 #define CONFIG_DTT_LM75 1
350 #define CONFIG_DTT_SENSORS { 0x49 }
354 * Environment settings
356 #define CONFIG_ENV_IS_IN_FLASH 1
357 /* This has to be a multiple of the Flash sector size */
358 #define CONFIG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
359 #define CONFIG_ENV_SIZE 0x1000
360 #define CONFIG_ENV_SECT_SIZE 0x20000
362 /* Configuration of redundant environment */
363 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
364 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
367 * Pin multiplexing configuration
371 * PSC2: GPIO (default)
372 * PSC3: GPIO (default)
374 * Ethernet: Ethernet 100Mbit with MD
376 * PSC6/IRDA: GPIO (default)
378 #define CFG_GPS_PORT_CONFIG 0x1105a004
382 * Motion-PRO's CPLD revision control register
384 #define CPLD_REV_REGISTER (CFG_CS2_START + 0x06)
388 * Miscellaneous configurable options
390 #define CFG_LONGHELP /* undef to save memory */
391 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
392 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
393 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
394 #define CFG_MAXARGS 16 /* max number of command args */
395 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
397 #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
398 #define CFG_MEMTEST_END 0x03e00000 /* 1 ... 62 MiB in DRAM */
399 #define CFG_ALT_MEMTEST
401 #define CFG_LOAD_ADDR 0x200000 /* default kernel load addr */
403 #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
407 * Various low-level settings
409 #define CFG_HID0_INIT HID0_ICE | HID0_ICFI
410 #define CFG_HID0_FINAL HID0_ICE
412 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
413 #define BOOTFLAG_WARM 0x02 /* Software reboot */
415 #define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
418 /* Not needed for MPC 5xxx U-Boot, but used by tools/updater */
419 #define CFG_RESET_ADDRESS 0xfff00100
421 /* pass open firmware flat tree */
422 #define CONFIG_OF_LIBFDT 1
423 #define CONFIG_OF_BOARD_SETUP 1
425 #define OF_CPU "PowerPC,5200@0"
426 #define OF_SOC "soc5200@f0000000"
427 #define OF_TBCLK (bd->bi_busfreq / 4)
428 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
430 #endif /* __CONFIG_H */