2 * (C) Copyright 2007 Czech Technical University.
4 * Michal SIMEK <monstr@seznam.cz>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include "../board/xilinx/ml401/xparameters.h"
30 #define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */
31 #define MICROBLAZE_V5 1
32 #define CONFIG_ML401 1 /* ML401 Board */
35 #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR
36 #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE
37 #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE }
39 /* setting reset address */
40 /*#define CFG_RESET_ADDRESS TEXT_BASE*/
43 #define CONFIG_EMACLITE 1
44 #define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID
48 #define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR
50 /* interrupt controller */
52 #define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR
53 #define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
57 #define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR
58 #define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ
59 #define FREQUENCE XILINX_CLOCK_FREQ
60 #define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 )
67 * memory layout - Example
68 * TEXT_BASE = 0x1200_0000;
69 * CFG_SRAM_BASE = 0x1000_0000;
70 * CFG_SRAM_SIZE = 0x0400_0000;
72 * CFG_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000
73 * CFG_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000
74 * CFG_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000
76 * 0x1000_0000 CFG_SDRAM_BASE
78 * 0x1200_0000 TEXT_BASE
84 * 0x13F7_F000 CFG_MALLOC_BASE
85 * MALLOC_AREA 256kB Alloc
86 * 0x11FB_F000 CFG_MONITOR_BASE
87 * MONITOR_CODE 256kB Env
88 * 0x13FF_F000 CFG_GBL_DATA_OFFSET
89 * GLOBAL_DATA 4kB bd, gd
90 * 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE
93 /* ddr sdram - main memory */
94 #define CFG_SDRAM_BASE XILINX_RAM_START
95 #define CFG_SDRAM_SIZE XILINX_RAM_SIZE
96 #define CFG_MEMTEST_START CFG_SDRAM_BASE
97 #define CFG_MEMTEST_END (CFG_SDRAM_BASE + 0x1000)
100 #define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */
101 /* start of global data */
102 #define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE)
106 #define CFG_MONITOR_LEN SIZE
107 #define CFG_MONITOR_BASE (CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN)
108 #define CFG_MONITOR_END (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
109 #define CFG_MALLOC_LEN SIZE
110 #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
113 #define CFG_INIT_SP_OFFSET CFG_MONITOR_BASE
119 #define CFG_FLASH_BASE XILINX_FLASH_START
120 #define CFG_FLASH_SIZE XILINX_FLASH_SIZE
121 #define CFG_FLASH_CFI 1
122 #define CFG_FLASH_CFI_DRIVER 1
123 #define CFG_FLASH_EMPTY_INFO 1 /* ?empty sector */
124 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
125 #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
126 #define CFG_FLASH_PROTECTION /* hardware flash protection */
129 #define CFG_ENV_IS_NOWHERE 1
130 #define CFG_ENV_SIZE 0x1000
131 #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE)
134 #define CFG_ENV_IS_IN_FLASH 1
135 #define CFG_ENV_ADDR 0x40000
136 #define CFG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */
137 #define CFG_ENV_SIZE 0x2000
138 #endif /* !RAMBOOT */
141 #define CFG_NO_FLASH 1
142 #define CFG_ENV_IS_NOWHERE 1
143 #define CFG_ENV_SIZE 0x1000
144 #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE)
145 #define CFG_FLASH_PROTECTION /* hardware flash protection */
151 * Command line configuration.
153 #include <config_cmd_default.h>
155 #define CONFIG_CMD_ASKENV
156 #define CONFIG_CMD_AUTOSCRIPT
157 #define CONFIG_CMD_BDI
158 #define CONFIG_CMD_CACHE
159 #define CONFIG_CMD_EXT2
160 #define CONFIG_CMD_FAT
161 #define CONFIG_CMD_IMI
162 #define CONFIG_CMD_IRQ
163 #define CONFIG_CMD_LOADB
164 #define CONFIG_CMD_LOADS
165 #define CONFIG_CMD_MEMORY
166 #define CONFIG_CMD_MISC
167 #define CONFIG_CMD_MFSL
168 #define CONFIG_CMD_NET
169 #define CONFIG_CMD_PING
170 #define CONFIG_CMD_RUN
173 #define CONFIG_CMD_ECHO
174 #define CONFIG_CMD_FLASH
175 #define CONFIG_CMD_IMLS
176 #define CONFIG_CMD_JFFS2
179 #define CONFIG_CMD_ENV
180 #define CONFIG_CMD_SAVES
186 #if defined(CONFIG_CMD_JFFS2)
187 /* JFFS2 partitions */
188 #define CONFIG_JFFS2_CMDLINE /* mtdparts command line support */
189 #define MTDIDS_DEFAULT "nor0=ml401-0"
191 /* default mtd partition table */
192 #define MTDPARTS_DEFAULT "mtdparts=ml401-0:256k(u-boot),"\
193 "256k(env),3m(kernel),1m(romfs),"\
194 "1m(cramfs),-(jffs2)"
197 /* Miscellaneous configurable options */
198 #define CFG_PROMPT "U-Boot-mONStR> "
199 #define CFG_CBSIZE 512 /* size of console buffer */
200 #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* print buffer size */
201 #define CFG_MAXARGS 15 /* max number of command args */
203 #define CFG_LOAD_ADDR 0x12000000 /* default load address */
205 #define CONFIG_BOOTDELAY 30
206 #define CONFIG_BOOTARGS "root=romfs"
207 #define CONFIG_HOSTNAME "ml401"
208 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
209 #define CONFIG_IPADDR 192.168.0.3
210 #define CONFIG_SERVERIP 192.168.0.5
211 #define CONFIG_GATEWAYIP 192.168.0.1
212 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD
214 /* architecture dependent code */
215 #define CFG_USR_EXCEP /* user exception */
219 #define CONFIG_SYSTEMACE
220 /* #define DEBUG_SYSTEMACE */
221 #define SYSTEMACE_CONFIG_FPGA
222 #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
223 #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
224 #define CONFIG_DOS_PARTITION
226 #define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo"
228 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\
230 "mtdparts=mtdparts=ml401-0:"\
231 "256k(u-boot),256k(env),3m(kernel),"\
232 "1m(romfs),1m(cramfs),-(jffs2)\0"
234 #endif /* __CONFIG_H */