2 * (C) Copyright 2007-2010 Michal Simek
4 * Michal SIMEK <monstr@monstr.eu>
6 * SPDX-License-Identifier: GPL-2.0+
12 #include "../board/xilinx/microblaze-generic/xparameters.h"
15 #define MICROBLAZE_V5 1
17 /* linear and spi flash memory */
18 #ifdef XILINX_FLASH_START
21 #undef RAMENV /* hold environment in flash */
23 #ifdef XILINX_SPI_FLASH_BASEADDR
26 #undef RAMENV /* hold environment in flash */
30 #define RAMENV /* hold environment in RAM */
35 # define CONFIG_BAUDRATE 115200
36 /* The following table includes the supported baudrates */
37 # define CONFIG_SYS_BAUDRATE_TABLE \
38 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
40 /* setting reset address */
41 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
44 #undef CONFIG_SYS_ENET
45 #if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL)
46 # define CONFIG_XILINX_EMACLITE 1
47 # define CONFIG_SYS_ENET
49 #if defined(XILINX_AXIEMAC_BASEADDR)
50 # define CONFIG_XILINX_AXIEMAC 1
51 # define CONFIG_SYS_ENET
57 #ifdef XILINX_GPIO_BASEADDR
58 # define CONFIG_XILINX_GPIO
59 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
62 /* interrupt controller */
63 #ifdef XILINX_INTC_BASEADDR
64 # define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
65 # define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
69 #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ)
70 # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
71 # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
75 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
76 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
77 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ
78 # ifndef CONFIG_SPL_BUILD
79 # define CONFIG_HW_WATCHDOG
80 # define CONFIG_XILINX_TB_WATCHDOG
84 #if !defined(CONFIG_OF_CONTROL) || \
85 (defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_OF_CONTROL))
86 /* ddr sdram - main memory */
87 # define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
88 # define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE
91 #define CONFIG_SYS_MALLOC_LEN 0xC0000
93 /* Stack location before relocation */
94 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \
95 CONFIG_SYS_MALLOC_F_LEN)
98 * CFI flash memory layout - Example
99 * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
100 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB
102 * SECT_SIZE = 0x20000; 128kB is one sector
103 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store
105 * 0x2200_0000 CONFIG_SYS_FLASH_BASE
107 * 0x2204_0000 CONFIG_ENV_ADDR
111 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
116 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
117 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
118 # define CONFIG_SYS_FLASH_CFI 1
119 # define CONFIG_FLASH_CFI_DRIVER 1
121 # define CONFIG_SYS_FLASH_EMPTY_INFO 1
122 /* max number of memory banks */
123 # define CONFIG_SYS_MAX_FLASH_BANKS 1
124 /* max number of sectors on one chip */
125 # define CONFIG_SYS_MAX_FLASH_SECT 512
126 /* hardware flash protection */
127 # define CONFIG_SYS_FLASH_PROTECTION
128 /* use buffered writes (20x faster) */
129 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
131 # define CONFIG_ENV_IS_NOWHERE 1
132 # define CONFIG_ENV_SIZE 0x1000
133 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
135 # else /* FLASH && !RAMENV */
136 # define CONFIG_ENV_IS_IN_FLASH 1
137 /* 128K(one sector) for env */
138 # define CONFIG_ENV_SECT_SIZE 0x20000
139 # define CONFIG_ENV_ADDR \
140 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
141 # define CONFIG_ENV_SIZE 0x20000
142 # endif /* FLASH && !RAMBOOT */
146 # define CONFIG_SYS_NO_FLASH 1
147 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR
148 # define CONFIG_SPI 1
149 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
150 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ
151 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS
154 # define CONFIG_ENV_IS_NOWHERE 1
155 # define CONFIG_ENV_SIZE 0x1000
156 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
158 # else /* SPIFLASH && !RAMENV */
159 # define CONFIG_ENV_IS_IN_SPI_FLASH 1
160 # define CONFIG_ENV_SPI_MODE SPI_MODE_3
161 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
162 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
163 /* 128K(two sectors) for env */
164 # define CONFIG_ENV_SECT_SIZE 0x10000
165 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE)
166 /* Warning: adjust the offset in respect of other flash content and size */
167 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
168 # endif /* SPIFLASH && !RAMBOOT */
169 #else /* !SPIFLASH */
172 # define CONFIG_SYS_NO_FLASH 1
173 # define CONFIG_ENV_IS_NOWHERE 1
174 # define CONFIG_ENV_SIZE 0x1000
175 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
176 #endif /* !SPIFLASH */
180 #ifdef XILINX_SYSACE_BASEADDR
181 # define CONFIG_SYSTEMACE
182 /* #define DEBUG_SYSTEMACE */
183 # define SYSTEMACE_CONFIG_FPGA
184 # define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
185 # define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
186 # define CONFIG_DOS_PARTITION
189 #if defined(XILINX_USE_ICACHE)
190 # define CONFIG_ICACHE
192 # undef CONFIG_ICACHE
195 #if defined(XILINX_USE_DCACHE)
196 # define CONFIG_DCACHE
198 # undef CONFIG_DCACHE
201 #ifndef XILINX_DCACHE_BYTE_SIZE
202 #define XILINX_DCACHE_BYTE_SIZE 32768
208 #define CONFIG_BOOTP_BOOTFILESIZE
209 #define CONFIG_BOOTP_BOOTPATH
210 #define CONFIG_BOOTP_GATEWAY
211 #define CONFIG_BOOTP_HOSTNAME
214 * Command line configuration.
216 #define CONFIG_CMD_ASKENV
217 #define CONFIG_CMD_IRQ
218 #define CONFIG_CMD_MFSL
220 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
221 # define CONFIG_CMD_CACHE
223 # undef CONFIG_CMD_CACHE
226 #ifdef CONFIG_SYS_ENET
227 # define CONFIG_CMD_PING
228 # define CONFIG_CMD_DHCP
229 # define CONFIG_CMD_TFTPPUT
232 #if defined(CONFIG_SYSTEMACE)
233 # define CONFIG_CMD_EXT2
234 # define CONFIG_CMD_FAT
238 # define CONFIG_CMD_JFFS2
239 # define CONFIG_CMD_UBI
240 # undef CONFIG_CMD_UBIFS
242 # if !defined(RAMENV)
243 # define CONFIG_CMD_SAVES
247 #if defined(SPIFLASH)
248 # define CONFIG_CMD_SF
250 # if !defined(RAMENV)
251 # define CONFIG_CMD_SAVES
254 # undef CONFIG_CMD_JFFS2
255 # undef CONFIG_CMD_UBI
256 # undef CONFIG_CMD_UBIFS
260 #if defined(CONFIG_CMD_JFFS2)
261 # define CONFIG_MTD_PARTITIONS
264 #if defined(CONFIG_CMD_UBIFS)
265 # define CONFIG_CMD_UBI
269 #if defined(CONFIG_CMD_UBI)
270 # define CONFIG_MTD_PARTITIONS
271 # define CONFIG_RBTREE
274 #if defined(CONFIG_MTD_PARTITIONS)
276 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */
277 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
278 #define CONFIG_FLASH_CFI_MTD
279 #define MTDIDS_DEFAULT "nor0=flash-0"
281 /* default mtd partition table */
282 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\
283 "256k(env),3m(kernel),1m(romfs),"\
284 "1m(cramfs),-(jffs2)"
287 /* size of console buffer */
288 #define CONFIG_SYS_CBSIZE 512
289 /* print buffer size */
290 #define CONFIG_SYS_PBSIZE \
291 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
292 /* max number of command args */
293 #define CONFIG_SYS_MAXARGS 15
294 #define CONFIG_SYS_LONGHELP
295 /* default load address */
296 #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START
298 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
299 #define CONFIG_BOOTARGS "root=romfs"
300 #define CONFIG_HOSTNAME XILINX_BOARD_NAME
301 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
302 #define CONFIG_IPADDR 192.168.0.3
303 #define CONFIG_SERVERIP 192.168.0.5
304 #define CONFIG_GATEWAYIP 192.168.0.1
306 /* architecture dependent code */
307 #define CONFIG_SYS_USR_EXCEP /* user exception */
309 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo"
311 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \
313 "mtdparts=mtdparts=flash-0:"\
314 "256k(u-boot),256k(env),3m(kernel),"\
315 "1m(romfs),1m(cramfs),-(jffs2)\0"\
316 "nc=setenv stdout nc;"\
317 "setenv stdin nc\0" \
318 "serial=setenv stdout serial;"\
319 "setenv stdin serial\0"
321 #define CONFIG_CMDLINE_EDITING
323 #define CONFIG_NETCONSOLE
324 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
326 /* Use the HUSH parser */
327 #define CONFIG_SYS_HUSH_PARSER
329 /* Enable flat device tree support */
332 #define CONFIG_OF_LIBFDT 1
334 #if defined(CONFIG_XILINX_AXIEMAC)
335 # define CONFIG_MII 1
336 # define CONFIG_CMD_MII 1
337 # define CONFIG_PHY_GIGE 1
338 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
339 # define CONFIG_PHY_ATHEROS 1
340 # define CONFIG_PHY_BROADCOM 1
341 # define CONFIG_PHY_DAVICOM 1
342 # define CONFIG_PHY_LXT 1
343 # define CONFIG_PHY_MARVELL 1
344 # define CONFIG_PHY_MICREL 1
345 # define CONFIG_PHY_NATSEMI 1
346 # define CONFIG_PHY_REALTEK 1
347 # define CONFIG_PHY_VITESSE 1
350 # undef CONFIG_CMD_MII
354 #define CONFIG_CMD_SPL
355 #define CONFIG_SPL_FRAMEWORK
356 #define CONFIG_SPL_LIBCOMMON_SUPPORT
357 #define CONFIG_SPL_LIBGENERIC_SUPPORT
358 #define CONFIG_SPL_SERIAL_SUPPORT
359 #define CONFIG_SPL_BOARD_INIT
361 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds"
363 #define CONFIG_SPL_RAM_DEVICE
364 #ifdef CONFIG_SYS_FLASH_BASE
365 # define CONFIG_SPL_NOR_SUPPORT
366 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
369 /* for booting directly linux */
370 #define CONFIG_SPL_OS_BOOT
372 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + \
374 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
376 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
379 /* SP location before relocation, must use scratch RAM */
381 #define CONFIG_SYS_INIT_RAM_ADDR 0x0
382 /* BRAM size - will be generated */
383 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000
385 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
386 CONFIG_SYS_INIT_RAM_SIZE - \
387 CONFIG_SYS_MALLOC_F_LEN)
389 /* Just for sure that there is a space for stack */
390 #define CONFIG_SPL_STACK_SIZE 0x100
392 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
394 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
395 CONFIG_SYS_INIT_RAM_ADDR - \
396 CONFIG_SYS_MALLOC_F_LEN - \
397 CONFIG_SPL_STACK_SIZE)
399 #endif /* __CONFIG_H */