2 * (C) Copyright 2007-2010 Michal Simek
4 * Michal SIMEK <monstr@monstr.eu>
6 * SPDX-License-Identifier: GPL-2.0+
12 #include "../board/xilinx/microblaze-generic/xparameters.h"
15 #define MICROBLAZE_V5 1
17 /* linear and spi flash memory */
18 #ifdef XILINX_FLASH_START
21 #undef RAMENV /* hold environment in flash */
23 #ifdef XILINX_SPI_FLASH_BASEADDR
26 #undef RAMENV /* hold environment in flash */
30 #define RAMENV /* hold environment in RAM */
35 # define CONFIG_BAUDRATE 115200
36 /* The following table includes the supported baudrates */
37 # define CONFIG_SYS_BAUDRATE_TABLE \
38 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
40 /* setting reset address */
41 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
44 #ifdef XILINX_GPIO_BASEADDR
45 # define CONFIG_XILINX_GPIO
46 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
48 #define CONFIG_BOARD_LATE_INIT
51 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
52 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
53 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ
54 # ifndef CONFIG_SPL_BUILD
55 # define CONFIG_HW_WATCHDOG
56 # define CONFIG_XILINX_TB_WATCHDOG
60 #define CONFIG_SYS_MALLOC_LEN 0xC0000
62 /* Stack location before relocation */
63 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \
64 CONFIG_SYS_MALLOC_F_LEN)
67 * CFI flash memory layout - Example
68 * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
69 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB
71 * SECT_SIZE = 0x20000; 128kB is one sector
72 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store
74 * 0x2200_0000 CONFIG_SYS_FLASH_BASE
76 * 0x2204_0000 CONFIG_ENV_ADDR
80 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
85 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
86 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
87 # define CONFIG_SYS_FLASH_CFI 1
88 # define CONFIG_FLASH_CFI_DRIVER 1
90 # define CONFIG_SYS_FLASH_EMPTY_INFO 1
91 /* max number of memory banks */
92 # define CONFIG_SYS_MAX_FLASH_BANKS 1
93 /* max number of sectors on one chip */
94 # define CONFIG_SYS_MAX_FLASH_SECT 512
95 /* hardware flash protection */
96 # define CONFIG_SYS_FLASH_PROTECTION
97 /* use buffered writes (20x faster) */
98 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
100 # define CONFIG_ENV_IS_NOWHERE 1
101 # define CONFIG_ENV_SIZE 0x1000
102 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
104 # else /* FLASH && !RAMENV */
105 # define CONFIG_ENV_IS_IN_FLASH 1
106 /* 128K(one sector) for env */
107 # define CONFIG_ENV_SECT_SIZE 0x20000
108 # define CONFIG_ENV_ADDR \
109 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
110 # define CONFIG_ENV_SIZE 0x20000
111 # endif /* FLASH && !RAMBOOT */
115 # define CONFIG_SYS_NO_FLASH 1
116 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR
117 # define CONFIG_SPI 1
118 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
119 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ
120 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS
123 # define CONFIG_ENV_IS_NOWHERE 1
124 # define CONFIG_ENV_SIZE 0x1000
125 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
127 # else /* SPIFLASH && !RAMENV */
128 # define CONFIG_ENV_IS_IN_SPI_FLASH 1
129 # define CONFIG_ENV_SPI_MODE SPI_MODE_3
130 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
131 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
132 /* 128K(two sectors) for env */
133 # define CONFIG_ENV_SECT_SIZE 0x10000
134 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE)
135 /* Warning: adjust the offset in respect of other flash content and size */
136 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
137 # endif /* SPIFLASH && !RAMBOOT */
138 #else /* !SPIFLASH */
141 # define CONFIG_SYS_NO_FLASH 1
142 # define CONFIG_ENV_IS_NOWHERE 1
143 # define CONFIG_ENV_SIZE 0x1000
144 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
145 #endif /* !SPIFLASH */
148 #if defined(XILINX_USE_ICACHE)
149 # define CONFIG_ICACHE
151 # undef CONFIG_ICACHE
154 #if defined(XILINX_USE_DCACHE)
155 # define CONFIG_DCACHE
157 # undef CONFIG_DCACHE
160 #ifndef XILINX_DCACHE_BYTE_SIZE
161 #define XILINX_DCACHE_BYTE_SIZE 32768
167 #define CONFIG_BOOTP_BOOTFILESIZE
168 #define CONFIG_BOOTP_BOOTPATH
169 #define CONFIG_BOOTP_GATEWAY
170 #define CONFIG_BOOTP_HOSTNAME
173 * Command line configuration.
175 #define CONFIG_CMD_IRQ
176 #define CONFIG_CMD_MFSL
179 # define CONFIG_CMD_JFFS2
180 # undef CONFIG_CMD_UBIFS
182 # if !defined(RAMENV)
183 # define CONFIG_CMD_SAVES
187 #if defined(SPIFLASH)
189 # if !defined(RAMENV)
190 # define CONFIG_CMD_SAVES
193 # undef CONFIG_CMD_JFFS2
194 # undef CONFIG_CMD_UBIFS
198 #if defined(CONFIG_CMD_JFFS2)
199 # define CONFIG_MTD_PARTITIONS
202 #if defined(CONFIG_CMD_UBIFS)
206 #if defined(CONFIG_CMD_UBI)
207 # define CONFIG_MTD_PARTITIONS
208 # define CONFIG_RBTREE
211 #if defined(CONFIG_MTD_PARTITIONS)
213 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */
214 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
215 #define CONFIG_FLASH_CFI_MTD
216 #define MTDIDS_DEFAULT "nor0=flash-0"
218 /* default mtd partition table */
219 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\
220 "256k(env),3m(kernel),1m(romfs),"\
221 "1m(cramfs),-(jffs2)"
224 /* size of console buffer */
225 #define CONFIG_SYS_CBSIZE 512
226 /* print buffer size */
227 #define CONFIG_SYS_PBSIZE \
228 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
229 /* max number of command args */
230 #define CONFIG_SYS_MAXARGS 15
231 #define CONFIG_SYS_LONGHELP
232 /* default load address */
233 #define CONFIG_SYS_LOAD_ADDR 0
235 #define CONFIG_BOOTARGS "root=romfs"
236 #define CONFIG_HOSTNAME XILINX_BOARD_NAME
237 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
239 /* architecture dependent code */
240 #define CONFIG_SYS_USR_EXCEP /* user exception */
242 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo"
244 #ifndef CONFIG_EXTRA_ENV_SETTINGS
245 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \
247 "mtdparts=mtdparts=flash-0:"\
248 "256k(u-boot),256k(env),3m(kernel),"\
249 "1m(romfs),1m(cramfs),-(jffs2)\0"\
250 "nc=setenv stdout nc;"\
251 "setenv stdin nc\0" \
252 "serial=setenv stdout serial;"\
253 "setenv stdin serial\0"
256 #define CONFIG_CMDLINE_EDITING
258 /* Enable flat device tree support */
261 #if defined(CONFIG_XILINX_AXIEMAC)
262 # define CONFIG_MII 1
263 # define CONFIG_PHY_GIGE 1
264 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
265 # define CONFIG_PHY_ATHEROS 1
266 # define CONFIG_PHY_BROADCOM 1
267 # define CONFIG_PHY_DAVICOM 1
268 # define CONFIG_PHY_LXT 1
269 # define CONFIG_PHY_MARVELL 1
270 # define CONFIG_PHY_MICREL 1
271 # define CONFIG_PHY_MICREL_KSZ9021
272 # define CONFIG_PHY_NATSEMI 1
273 # define CONFIG_PHY_REALTEK 1
274 # define CONFIG_PHY_VITESSE 1
280 #define CONFIG_CMD_SPL
281 #define CONFIG_SPL_FRAMEWORK
282 #define CONFIG_SPL_BOARD_INIT
284 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds"
286 #define CONFIG_SPL_RAM_DEVICE
287 #ifdef CONFIG_SYS_FLASH_BASE
288 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
291 /* for booting directly linux */
293 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
295 #define CONFIG_SYS_FDT_SIZE (16<<10)
296 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
299 /* SP location before relocation, must use scratch RAM */
301 #define CONFIG_SYS_INIT_RAM_ADDR 0x0
302 /* BRAM size - will be generated */
303 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000
305 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
306 CONFIG_SYS_INIT_RAM_SIZE - \
307 CONFIG_SYS_MALLOC_F_LEN)
309 /* Just for sure that there is a space for stack */
310 #define CONFIG_SPL_STACK_SIZE 0x100
312 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
314 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
315 CONFIG_SYS_INIT_RAM_ADDR - \
316 CONFIG_SYS_MALLOC_F_LEN - \
317 CONFIG_SPL_STACK_SIZE)
319 #endif /* __CONFIG_H */