2 * (C) Copyright 2007-2010 Michal Simek
4 * Michal SIMEK <monstr@monstr.eu>
6 * SPDX-License-Identifier: GPL-2.0+
12 #include "../board/xilinx/microblaze-generic/xparameters.h"
15 #define MICROBLAZE_V5 1
17 /* linear and spi flash memory */
18 #ifdef XILINX_FLASH_START
21 #undef RAMENV /* hold environment in flash */
23 #ifdef XILINX_SPI_FLASH_BASEADDR
26 #undef RAMENV /* hold environment in flash */
30 #define RAMENV /* hold environment in RAM */
35 /* The following table includes the supported baudrates */
36 # define CONFIG_SYS_BAUDRATE_TABLE \
37 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
39 /* setting reset address */
40 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
43 #ifdef XILINX_GPIO_BASEADDR
44 # define CONFIG_XILINX_GPIO
45 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
49 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
50 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
51 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ
52 # ifndef CONFIG_SPL_BUILD
53 # define CONFIG_HW_WATCHDOG
54 # define CONFIG_XILINX_TB_WATCHDOG
58 #define CONFIG_SYS_MALLOC_LEN 0xC0000
60 /* Stack location before relocation */
61 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \
62 CONFIG_SYS_MALLOC_F_LEN)
65 * CFI flash memory layout - Example
66 * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
67 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB
69 * SECT_SIZE = 0x20000; 128kB is one sector
70 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store
72 * 0x2200_0000 CONFIG_SYS_FLASH_BASE
74 * 0x2204_0000 CONFIG_ENV_ADDR
78 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
83 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
84 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
85 # define CONFIG_SYS_FLASH_CFI 1
86 # define CONFIG_FLASH_CFI_DRIVER 1
88 # define CONFIG_SYS_FLASH_EMPTY_INFO 1
89 /* max number of memory banks */
90 # define CONFIG_SYS_MAX_FLASH_BANKS 1
91 /* max number of sectors on one chip */
92 # define CONFIG_SYS_MAX_FLASH_SECT 512
93 /* hardware flash protection */
94 # define CONFIG_SYS_FLASH_PROTECTION
95 /* use buffered writes (20x faster) */
96 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
98 # define CONFIG_ENV_IS_NOWHERE 1
99 # define CONFIG_ENV_SIZE 0x1000
100 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
102 # else /* FLASH && !RAMENV */
103 # define CONFIG_ENV_IS_IN_FLASH 1
104 /* 128K(one sector) for env */
105 # define CONFIG_ENV_SECT_SIZE 0x20000
106 # define CONFIG_ENV_ADDR \
107 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
108 # define CONFIG_ENV_SIZE 0x20000
109 # endif /* FLASH && !RAMBOOT */
113 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR
114 # define CONFIG_SPI 1
115 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
116 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ
117 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS
120 # define CONFIG_ENV_IS_NOWHERE 1
121 # define CONFIG_ENV_SIZE 0x1000
122 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
124 # else /* SPIFLASH && !RAMENV */
125 # define CONFIG_ENV_IS_IN_SPI_FLASH 1
126 # define CONFIG_ENV_SPI_MODE SPI_MODE_3
127 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
128 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
129 /* 128K(two sectors) for env */
130 # define CONFIG_ENV_SECT_SIZE 0x10000
131 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE)
132 /* Warning: adjust the offset in respect of other flash content and size */
133 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
134 # endif /* SPIFLASH && !RAMBOOT */
135 #else /* !SPIFLASH */
138 # define CONFIG_ENV_IS_NOWHERE 1
139 # define CONFIG_ENV_SIZE 0x1000
140 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
141 #endif /* !SPIFLASH */
144 #if defined(XILINX_USE_ICACHE)
145 # define CONFIG_ICACHE
147 # undef CONFIG_ICACHE
150 #if defined(XILINX_USE_DCACHE)
151 # define CONFIG_DCACHE
153 # undef CONFIG_DCACHE
156 #ifndef XILINX_DCACHE_BYTE_SIZE
157 #define XILINX_DCACHE_BYTE_SIZE 32768
163 #define CONFIG_BOOTP_BOOTFILESIZE
164 #define CONFIG_BOOTP_BOOTPATH
165 #define CONFIG_BOOTP_GATEWAY
166 #define CONFIG_BOOTP_HOSTNAME
169 * Command line configuration.
171 #define CONFIG_CMD_MFSL
174 # undef CONFIG_CMD_UBIFS
176 # if !defined(RAMENV)
177 # define CONFIG_CMD_SAVES
181 #if defined(SPIFLASH)
183 # if !defined(RAMENV)
184 # define CONFIG_CMD_SAVES
187 # undef CONFIG_CMD_UBIFS
191 #if defined(CONFIG_CMD_JFFS2)
192 # define CONFIG_MTD_PARTITIONS
195 #if defined(CONFIG_CMD_UBIFS)
199 #if defined(CONFIG_CMD_UBI)
200 # define CONFIG_MTD_PARTITIONS
201 # define CONFIG_RBTREE
204 #if defined(CONFIG_MTD_PARTITIONS)
206 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */
207 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
208 #define CONFIG_FLASH_CFI_MTD
209 #define MTDIDS_DEFAULT "nor0=flash-0"
211 /* default mtd partition table */
212 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\
213 "256k(env),3m(kernel),1m(romfs),"\
214 "1m(cramfs),-(jffs2)"
217 /* size of console buffer */
218 #define CONFIG_SYS_CBSIZE 512
219 /* print buffer size */
220 #define CONFIG_SYS_PBSIZE \
221 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
222 /* max number of command args */
223 #define CONFIG_SYS_MAXARGS 15
224 #define CONFIG_SYS_LONGHELP
225 /* default load address */
226 #define CONFIG_SYS_LOAD_ADDR 0
228 #define CONFIG_BOOTARGS "root=romfs"
229 #define CONFIG_HOSTNAME XILINX_BOARD_NAME
230 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
232 /* architecture dependent code */
233 #define CONFIG_SYS_USR_EXCEP /* user exception */
235 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo"
237 #ifndef CONFIG_EXTRA_ENV_SETTINGS
238 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \
240 "mtdparts=mtdparts=flash-0:"\
241 "256k(u-boot),256k(env),3m(kernel),"\
242 "1m(romfs),1m(cramfs),-(jffs2)\0"\
243 "nc=setenv stdout nc;"\
244 "setenv stdin nc\0" \
245 "serial=setenv stdout serial;"\
246 "setenv stdin serial\0"
249 #define CONFIG_CMDLINE_EDITING
251 /* Enable flat device tree support */
254 #if defined(CONFIG_XILINX_AXIEMAC)
255 # define CONFIG_MII 1
256 # define CONFIG_PHY_GIGE 1
257 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
258 # define CONFIG_PHY_ATHEROS 1
259 # define CONFIG_PHY_BROADCOM 1
260 # define CONFIG_PHY_DAVICOM 1
261 # define CONFIG_PHY_LXT 1
262 # define CONFIG_PHY_MARVELL 1
263 # define CONFIG_PHY_MICREL 1
264 # define CONFIG_PHY_MICREL_KSZ9021
265 # define CONFIG_PHY_NATSEMI 1
266 # define CONFIG_PHY_REALTEK 1
267 # define CONFIG_PHY_VITESSE 1
273 #define CONFIG_CMD_SPL
274 #define CONFIG_SPL_FRAMEWORK
276 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds"
278 #ifdef CONFIG_SYS_FLASH_BASE
279 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
282 /* for booting directly linux */
284 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
286 #define CONFIG_SYS_FDT_SIZE (16<<10)
287 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
290 /* SP location before relocation, must use scratch RAM */
292 #define CONFIG_SYS_INIT_RAM_ADDR 0x0
293 /* BRAM size - will be generated */
294 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000
296 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
297 CONFIG_SYS_INIT_RAM_SIZE - \
298 CONFIG_SYS_MALLOC_F_LEN)
300 /* Just for sure that there is a space for stack */
301 #define CONFIG_SPL_STACK_SIZE 0x100
303 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
305 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
306 CONFIG_SYS_INIT_RAM_ADDR - \
307 CONFIG_SYS_MALLOC_F_LEN - \
308 CONFIG_SPL_STACK_SIZE)
310 #endif /* __CONFIG_H */