2 * (C) Copyright 2007-2010 Michal Simek
4 * Michal SIMEK <monstr@monstr.eu>
6 * SPDX-License-Identifier: GPL-2.0+
12 #include "../board/xilinx/microblaze-generic/xparameters.h"
15 #define MICROBLAZE_V5 1
17 /* linear and spi flash memory */
18 #ifdef XILINX_FLASH_START
21 #undef RAMENV /* hold environment in flash */
23 #ifdef XILINX_SPI_FLASH_BASEADDR
26 #undef RAMENV /* hold environment in flash */
30 #define RAMENV /* hold environment in RAM */
35 #ifdef XILINX_UARTLITE_BASEADDR
36 # define CONFIG_XILINX_UARTLITE
37 # define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
38 # define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
39 # define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
40 # define CONSOLE_ARG "console=console=ttyUL0,115200\0"
41 #elif XILINX_UART16550_BASEADDR
42 # define CONFIG_SYS_NS16550 1
43 # define CONFIG_SYS_NS16550_SERIAL
44 # if defined(__MICROBLAZEEL__)
45 # define CONFIG_SYS_NS16550_REG_SIZE -4
47 # define CONFIG_SYS_NS16550_REG_SIZE 4
49 # define CONFIG_CONS_INDEX 1
50 # define CONFIG_SYS_NS16550_COM1 \
51 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
52 # define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
53 # define CONFIG_BAUDRATE 115200
55 /* The following table includes the supported baudrates */
56 # define CONFIG_SYS_BAUDRATE_TABLE \
57 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
58 # define CONSOLE_ARG "console=console=ttyS0,115200\0"
60 # error Undefined uart
63 /* setting reset address */
64 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
67 #undef CONFIG_SYS_ENET
68 #if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL)
69 # define CONFIG_XILINX_EMACLITE 1
70 # define CONFIG_SYS_ENET
72 #if defined(XILINX_LLTEMAC_BASEADDR)
73 # define CONFIG_XILINX_LL_TEMAC 1
74 # define CONFIG_SYS_ENET
76 #if defined(XILINX_AXIEMAC_BASEADDR)
77 # define CONFIG_XILINX_AXIEMAC 1
78 # define CONFIG_SYS_ENET
84 #ifdef XILINX_GPIO_BASEADDR
85 # define CONFIG_XILINX_GPIO
86 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
89 /* interrupt controller */
90 #ifdef XILINX_INTC_BASEADDR
91 # define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
92 # define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
96 #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ)
97 # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
98 # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
102 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
103 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
104 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ
105 # define CONFIG_HW_WATCHDOG
106 # define CONFIG_XILINX_TB_WATCHDOG
109 #if !defined(CONFIG_OF_CONTROL) || \
110 (defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_OF_CONTROL))
111 /* ddr sdram - main memory */
112 # define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
113 # define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE
116 #define CONFIG_SYS_MALLOC_LEN 0xC0000
117 #ifndef CONFIG_SPL_BUILD
118 # define CONFIG_SYS_MALLOC_F_LEN 1024
120 # define CONFIG_SYS_MALLOC_SIMPLE
121 # define CONFIG_SYS_MALLOC_F_LEN 0x150
124 /* Stack location before relocation */
125 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_TEXT_BASE
128 * CFI flash memory layout - Example
129 * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
130 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB
132 * SECT_SIZE = 0x20000; 128kB is one sector
133 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store
135 * 0x2200_0000 CONFIG_SYS_FLASH_BASE
137 * 0x2204_0000 CONFIG_ENV_ADDR
141 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
146 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
147 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
148 # define CONFIG_SYS_FLASH_CFI 1
149 # define CONFIG_FLASH_CFI_DRIVER 1
151 # define CONFIG_SYS_FLASH_EMPTY_INFO 1
152 /* max number of memory banks */
153 # define CONFIG_SYS_MAX_FLASH_BANKS 1
154 /* max number of sectors on one chip */
155 # define CONFIG_SYS_MAX_FLASH_SECT 512
156 /* hardware flash protection */
157 # define CONFIG_SYS_FLASH_PROTECTION
158 /* use buffered writes (20x faster) */
159 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
161 # define CONFIG_ENV_IS_NOWHERE 1
162 # define CONFIG_ENV_SIZE 0x1000
163 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
165 # else /* FLASH && !RAMENV */
166 # define CONFIG_ENV_IS_IN_FLASH 1
167 /* 128K(one sector) for env */
168 # define CONFIG_ENV_SECT_SIZE 0x20000
169 # define CONFIG_ENV_ADDR \
170 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
171 # define CONFIG_ENV_SIZE 0x20000
172 # endif /* FLASH && !RAMBOOT */
176 # define CONFIG_SYS_NO_FLASH 1
177 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR
178 # define CONFIG_XILINX_SPI 1
179 # define CONFIG_SPI 1
180 # define CONFIG_SPI_FLASH_STMICRO 1
181 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
182 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ
183 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS
186 # define CONFIG_ENV_IS_NOWHERE 1
187 # define CONFIG_ENV_SIZE 0x1000
188 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
190 # else /* SPIFLASH && !RAMENV */
191 # define CONFIG_ENV_IS_IN_SPI_FLASH 1
192 # define CONFIG_ENV_SPI_MODE SPI_MODE_3
193 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
194 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
195 /* 128K(two sectors) for env */
196 # define CONFIG_ENV_SECT_SIZE 0x10000
197 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE)
198 /* Warning: adjust the offset in respect of other flash content and size */
199 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
200 # endif /* SPIFLASH && !RAMBOOT */
201 #else /* !SPIFLASH */
204 # define CONFIG_SYS_NO_FLASH 1
205 # define CONFIG_ENV_IS_NOWHERE 1
206 # define CONFIG_ENV_SIZE 0x1000
207 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
208 #endif /* !SPIFLASH */
212 #ifdef XILINX_SYSACE_BASEADDR
213 # define CONFIG_SYSTEMACE
214 /* #define DEBUG_SYSTEMACE */
215 # define SYSTEMACE_CONFIG_FPGA
216 # define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
217 # define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
218 # define CONFIG_DOS_PARTITION
221 #if defined(XILINX_USE_ICACHE)
222 # define CONFIG_ICACHE
224 # undef CONFIG_ICACHE
227 #if defined(XILINX_USE_DCACHE)
228 # define CONFIG_DCACHE
230 # undef CONFIG_DCACHE
233 #ifndef XILINX_DCACHE_BYTE_SIZE
234 #define XILINX_DCACHE_BYTE_SIZE 32768
240 #define CONFIG_BOOTP_BOOTFILESIZE
241 #define CONFIG_BOOTP_BOOTPATH
242 #define CONFIG_BOOTP_GATEWAY
243 #define CONFIG_BOOTP_HOSTNAME
246 * Command line configuration.
248 #define CONFIG_CMD_ASKENV
249 #define CONFIG_CMD_IRQ
250 #define CONFIG_CMD_MFSL
251 #define CONFIG_CMD_GPIO
253 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
254 # define CONFIG_CMD_CACHE
256 # undef CONFIG_CMD_CACHE
259 #ifdef CONFIG_SYS_ENET
260 # define CONFIG_CMD_PING
261 # define CONFIG_CMD_DHCP
262 # define CONFIG_CMD_TFTPPUT
265 #if defined(CONFIG_SYSTEMACE)
266 # define CONFIG_CMD_EXT2
267 # define CONFIG_CMD_FAT
271 # define CONFIG_CMD_JFFS2
272 # define CONFIG_CMD_UBI
273 # undef CONFIG_CMD_UBIFS
275 # if !defined(RAMENV)
276 # define CONFIG_CMD_SAVES
280 #if defined(SPIFLASH)
281 # define CONFIG_CMD_SF
283 # if !defined(RAMENV)
284 # define CONFIG_CMD_SAVES
287 # undef CONFIG_CMD_JFFS2
288 # undef CONFIG_CMD_UBI
289 # undef CONFIG_CMD_UBIFS
293 #if defined(CONFIG_CMD_JFFS2)
294 # define CONFIG_MTD_PARTITIONS
297 #if defined(CONFIG_CMD_UBIFS)
298 # define CONFIG_CMD_UBI
302 #if defined(CONFIG_CMD_UBI)
303 # define CONFIG_MTD_PARTITIONS
304 # define CONFIG_RBTREE
307 #if defined(CONFIG_MTD_PARTITIONS)
309 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */
310 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
311 #define CONFIG_FLASH_CFI_MTD
312 #define MTDIDS_DEFAULT "nor0=flash-0"
314 /* default mtd partition table */
315 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\
316 "256k(env),3m(kernel),1m(romfs),"\
317 "1m(cramfs),-(jffs2)"
320 /* size of console buffer */
321 #define CONFIG_SYS_CBSIZE 512
322 /* print buffer size */
323 #define CONFIG_SYS_PBSIZE \
324 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
325 /* max number of command args */
326 #define CONFIG_SYS_MAXARGS 15
327 #define CONFIG_SYS_LONGHELP
328 /* default load address */
329 #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START
331 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
332 #define CONFIG_BOOTARGS "root=romfs"
333 #define CONFIG_HOSTNAME XILINX_BOARD_NAME
334 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
335 #define CONFIG_IPADDR 192.168.0.3
336 #define CONFIG_SERVERIP 192.168.0.5
337 #define CONFIG_GATEWAYIP 192.168.0.1
339 /* architecture dependent code */
340 #define CONFIG_SYS_USR_EXCEP /* user exception */
342 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo"
344 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \
346 "mtdparts=mtdparts=flash-0:"\
347 "256k(u-boot),256k(env),3m(kernel),"\
348 "1m(romfs),1m(cramfs),-(jffs2)\0"\
349 "nc=setenv stdout nc;"\
350 "setenv stdin nc\0" \
351 "serial=setenv stdout serial;"\
352 "setenv stdin serial\0"
354 #define CONFIG_CMDLINE_EDITING
356 #define CONFIG_NETCONSOLE
357 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
359 /* Use the HUSH parser */
360 #define CONFIG_SYS_HUSH_PARSER
362 /* Enable flat device tree support */
365 #define CONFIG_OF_LIBFDT 1
367 #if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC)
368 # define CONFIG_MII 1
369 # define CONFIG_CMD_MII 1
370 # define CONFIG_PHY_GIGE 1
371 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
372 # define CONFIG_PHYLIB 1
373 # define CONFIG_PHY_ATHEROS 1
374 # define CONFIG_PHY_BROADCOM 1
375 # define CONFIG_PHY_DAVICOM 1
376 # define CONFIG_PHY_LXT 1
377 # define CONFIG_PHY_MARVELL 1
378 # define CONFIG_PHY_MICREL 1
379 # define CONFIG_PHY_NATSEMI 1
380 # define CONFIG_PHY_REALTEK 1
381 # define CONFIG_PHY_VITESSE 1
384 # undef CONFIG_CMD_MII
385 # undef CONFIG_PHYLIB
389 #define CONFIG_CMD_SPL
390 #define CONFIG_SPL_FRAMEWORK
391 #define CONFIG_SPL_LIBCOMMON_SUPPORT
392 #define CONFIG_SPL_LIBGENERIC_SUPPORT
393 #define CONFIG_SPL_SERIAL_SUPPORT
394 #define CONFIG_SPL_BOARD_INIT
396 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds"
398 #define CONFIG_SPL_RAM_DEVICE
399 #ifdef CONFIG_SYS_FLASH_BASE
400 # define CONFIG_SPL_NOR_SUPPORT
401 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
404 /* for booting directly linux */
405 #define CONFIG_SPL_OS_BOOT
407 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + \
409 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
411 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
414 /* SP location before relocation, must use scratch RAM */
416 #define CONFIG_SYS_INIT_RAM_ADDR 0x0
417 /* BRAM size - will be generated */
418 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000
420 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
421 CONFIG_SYS_INIT_RAM_SIZE - \
422 CONFIG_SYS_MALLOC_F_LEN)
424 /* Just for sure that there is a space for stack */
425 #define CONFIG_SPL_STACK_SIZE 0x100
427 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
429 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
430 CONFIG_SYS_INIT_RAM_ADDR - \
431 CONFIG_SYS_MALLOC_F_LEN - \
432 CONFIG_SPL_STACK_SIZE)
434 #endif /* __CONFIG_H */