2 * (C) Copyright 2007-2008 Michal Simek
4 * Michal SIMEK <monstr@monstr.eu>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include "../board/xilinx/microblaze-generic/xparameters.h"
30 #define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */
31 #define MICROBLAZE_V5 1
34 #ifdef XILINX_UARTLITE_BASEADDR
35 #define CONFIG_XILINX_UARTLITE
36 #define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
37 #define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
38 #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
39 #define CONSOLE_ARG "console=console=ttyUL0,115200\0"
40 #elif XILINX_UART16550_BASEADDR
41 #define CONFIG_SYS_NS16550 1
42 #define CONFIG_SYS_NS16550_SERIAL
43 #define CONFIG_SYS_NS16550_REG_SIZE -4
44 #define CONFIG_CONS_INDEX 1
45 #define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3)
46 #define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
47 #define CONFIG_BAUDRATE 115200
49 /* The following table includes the supported baudrates */
50 #define CONFIG_SYS_BAUDRATE_TABLE \
51 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
52 #define CONSOLE_ARG "console=console=ttyS0,115200\0"
57 /* setting reset address */
58 /*#define CONFIG_SYS_RESET_ADDRESS TEXT_BASE*/
61 #ifdef XILINX_EMAC_BASEADDR
62 #define CONFIG_XILINX_EMAC 1
63 #define CONFIG_SYS_ENET
64 #elif XILINX_EMACLITE_BASEADDR
65 #define CONFIG_XILINX_EMACLITE 1
66 #define CONFIG_SYS_ENET
67 #elif XILINX_LLTEMAC_BASEADDR
68 #define CONFIG_XILINX_LL_TEMAC 1
69 #define CONFIG_SYS_ENET
75 #ifdef XILINX_GPIO_BASEADDR
76 #define CONFIG_SYS_GPIO_0 1
77 #define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
80 /* interrupt controller */
81 #ifdef XILINX_INTC_BASEADDR
82 #define CONFIG_SYS_INTC_0 1
83 #define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
84 #define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
88 #ifdef XILINX_TIMER_BASEADDR
89 #if (XILINX_TIMER_IRQ != -1)
90 #define CONFIG_SYS_TIMER_0 1
91 #define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
92 #define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
93 #define FREQUENCE XILINX_CLOCK_FREQ
94 #define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 )
96 #elif XILINX_CLOCK_FREQ
97 #define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
102 /* #define CONFIG_SYS_FSL_2 */
103 /* #define FSL_INTR_2 1 */
106 * memory layout - Example
107 * TEXT_BASE = 0x1200_0000;
108 * CONFIG_SYS_SRAM_BASE = 0x1000_0000;
109 * CONFIG_SYS_SRAM_SIZE = 0x0400_0000;
111 * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000
112 * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000
113 * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000
115 * 0x1000_0000 CONFIG_SYS_SDRAM_BASE
117 * 0x1200_0000 TEXT_BASE
123 * 0x13F7_F000 CONFIG_SYS_MALLOC_BASE
124 * MALLOC_AREA 256kB Alloc
125 * 0x11FB_F000 CONFIG_SYS_MONITOR_BASE
126 * MONITOR_CODE 256kB Env
127 * 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET
128 * GLOBAL_DATA 4kB bd, gd
129 * 0x1400_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE
132 /* ddr sdram - main memory */
133 #define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
134 #define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE
135 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
136 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
139 #define CONFIG_SYS_GBL_DATA_SIZE 0x1000 /* size of global data */
140 /* start of global data */
141 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
145 #define CONFIG_SYS_MONITOR_LEN SIZE
146 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN)
147 #define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
148 #define CONFIG_SYS_MALLOC_LEN SIZE
149 #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
152 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MONITOR_BASE
158 #define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
159 #define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
160 #define CONFIG_SYS_FLASH_CFI 1
161 #define CONFIG_FLASH_CFI_DRIVER 1
162 #define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */
163 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
164 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
165 #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */
168 #define CONFIG_ENV_IS_NOWHERE 1
169 #define CONFIG_ENV_SIZE 0x1000
170 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
173 #define CONFIG_ENV_IS_IN_FLASH 1
174 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */
175 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
176 #define CONFIG_ENV_SIZE 0x20000
177 #endif /* !RAMBOOT */
180 #define CONFIG_SYS_NO_FLASH 1
181 #define CONFIG_ENV_IS_NOWHERE 1
182 #define CONFIG_ENV_SIZE 0x1000
183 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
184 #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */
188 #ifdef XILINX_SYSACE_BASEADDR
189 #define CONFIG_SYSTEMACE
190 /* #define DEBUG_SYSTEMACE */
191 #define SYSTEMACE_CONFIG_FPGA
192 #define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
193 #define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
194 #define CONFIG_DOS_PARTITION
197 #if defined(XILINX_USE_ICACHE)
198 #define CONFIG_ICACHE
203 #if defined(XILINX_USE_DCACHE)
204 #define CONFIG_DCACHE
212 #define CONFIG_BOOTP_BOOTFILESIZE
213 #define CONFIG_BOOTP_BOOTPATH
214 #define CONFIG_BOOTP_GATEWAY
215 #define CONFIG_BOOTP_HOSTNAME
218 * Command line configuration.
220 #include <config_cmd_default.h>
222 #define CONFIG_CMD_ASKENV
223 #define CONFIG_CMD_IRQ
224 #define CONFIG_CMD_MFSL
225 #define CONFIG_CMD_ECHO
227 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
228 #define CONFIG_CMD_CACHE
230 #undef CONFIG_CMD_CACHE
233 #ifndef CONFIG_SYS_ENET
234 #undef CONFIG_CMD_NET
236 #define CONFIG_CMD_PING
239 #if defined(CONFIG_SYSTEMACE)
240 #define CONFIG_CMD_EXT2
241 #define CONFIG_CMD_FAT
245 #define CONFIG_CMD_ECHO
246 #define CONFIG_CMD_FLASH
247 #define CONFIG_CMD_IMLS
248 #define CONFIG_CMD_JFFS2
251 #define CONFIG_CMD_SAVEENV
252 #define CONFIG_CMD_SAVES
255 #undef CONFIG_CMD_IMLS
256 #undef CONFIG_CMD_FLASH
257 #undef CONFIG_CMD_JFFS2
260 #if defined(CONFIG_CMD_JFFS2)
261 /* JFFS2 partitions */
262 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */
263 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
264 #define CONFIG_FLASH_CFI_MTD
265 #define MTDIDS_DEFAULT "nor0=ml401-0"
267 /* default mtd partition table */
268 #define MTDPARTS_DEFAULT "mtdparts=ml401-0:256k(u-boot),"\
269 "256k(env),3m(kernel),1m(romfs),"\
270 "1m(cramfs),-(jffs2)"
273 /* Miscellaneous configurable options */
274 #define CONFIG_SYS_PROMPT "U-Boot-mONStR> "
275 #define CONFIG_SYS_CBSIZE 512 /* size of console buffer */
276 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
277 #define CONFIG_SYS_MAXARGS 15 /* max number of command args */
278 #define CONFIG_SYS_LONGHELP
279 #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START /* default load address */
281 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
282 #define CONFIG_BOOTARGS "root=romfs"
283 #define CONFIG_HOSTNAME XILINX_BOARD_NAME
284 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
285 #define CONFIG_IPADDR 192.168.0.3
286 #define CONFIG_SERVERIP 192.168.0.5
287 #define CONFIG_GATEWAYIP 192.168.0.1
288 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD
290 /* architecture dependent code */
291 #define CONFIG_SYS_USR_EXCEP /* user exception */
292 #define CONFIG_SYS_HZ 1000
294 #define CONFIG_PREBOOT "echo U-BOOT for $(hostname);setenv preboot;echo"
296 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\
298 "mtdparts=mtdparts=ml401-0:"\
299 "256k(u-boot),256k(env),3m(kernel),"\
300 "1m(romfs),1m(cramfs),-(jffs2)\0"
302 #define CONFIG_CMDLINE_EDITING
304 #endif /* __CONFIG_H */