2 * (C) Copyright 2007-2010 Michal Simek
4 * Michal SIMEK <monstr@monstr.eu>
6 * SPDX-License-Identifier: GPL-2.0+
12 #include "../board/xilinx/microblaze-generic/xparameters.h"
15 #define MICROBLAZE_V5 1
17 /* linear and spi flash memory */
18 #ifdef XILINX_FLASH_START
21 #undef RAMENV /* hold environment in flash */
23 #ifdef XILINX_SPI_FLASH_BASEADDR
26 #undef RAMENV /* hold environment in flash */
30 #define RAMENV /* hold environment in RAM */
35 # define CONFIG_BAUDRATE 115200
36 /* The following table includes the supported baudrates */
37 # define CONFIG_SYS_BAUDRATE_TABLE \
38 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
40 /* setting reset address */
41 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
44 #ifdef XILINX_GPIO_BASEADDR
45 # define CONFIG_XILINX_GPIO
46 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
50 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
51 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
52 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ
53 # ifndef CONFIG_SPL_BUILD
54 # define CONFIG_HW_WATCHDOG
55 # define CONFIG_XILINX_TB_WATCHDOG
59 #define CONFIG_SYS_MALLOC_LEN 0xC0000
61 /* Stack location before relocation */
62 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \
63 CONFIG_SYS_MALLOC_F_LEN)
66 * CFI flash memory layout - Example
67 * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
68 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB
70 * SECT_SIZE = 0x20000; 128kB is one sector
71 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store
73 * 0x2200_0000 CONFIG_SYS_FLASH_BASE
75 * 0x2204_0000 CONFIG_ENV_ADDR
79 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
84 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
85 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
86 # define CONFIG_SYS_FLASH_CFI 1
87 # define CONFIG_FLASH_CFI_DRIVER 1
89 # define CONFIG_SYS_FLASH_EMPTY_INFO 1
90 /* max number of memory banks */
91 # define CONFIG_SYS_MAX_FLASH_BANKS 1
92 /* max number of sectors on one chip */
93 # define CONFIG_SYS_MAX_FLASH_SECT 512
94 /* hardware flash protection */
95 # define CONFIG_SYS_FLASH_PROTECTION
96 /* use buffered writes (20x faster) */
97 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
99 # define CONFIG_ENV_IS_NOWHERE 1
100 # define CONFIG_ENV_SIZE 0x1000
101 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
103 # else /* FLASH && !RAMENV */
104 # define CONFIG_ENV_IS_IN_FLASH 1
105 /* 128K(one sector) for env */
106 # define CONFIG_ENV_SECT_SIZE 0x20000
107 # define CONFIG_ENV_ADDR \
108 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
109 # define CONFIG_ENV_SIZE 0x20000
110 # endif /* FLASH && !RAMBOOT */
114 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR
115 # define CONFIG_SPI 1
116 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
117 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ
118 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS
121 # define CONFIG_ENV_IS_NOWHERE 1
122 # define CONFIG_ENV_SIZE 0x1000
123 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
125 # else /* SPIFLASH && !RAMENV */
126 # define CONFIG_ENV_IS_IN_SPI_FLASH 1
127 # define CONFIG_ENV_SPI_MODE SPI_MODE_3
128 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
129 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
130 /* 128K(two sectors) for env */
131 # define CONFIG_ENV_SECT_SIZE 0x10000
132 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE)
133 /* Warning: adjust the offset in respect of other flash content and size */
134 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
135 # endif /* SPIFLASH && !RAMBOOT */
136 #else /* !SPIFLASH */
139 # define CONFIG_ENV_IS_NOWHERE 1
140 # define CONFIG_ENV_SIZE 0x1000
141 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
142 #endif /* !SPIFLASH */
145 #if defined(XILINX_USE_ICACHE)
146 # define CONFIG_ICACHE
148 # undef CONFIG_ICACHE
151 #if defined(XILINX_USE_DCACHE)
152 # define CONFIG_DCACHE
154 # undef CONFIG_DCACHE
157 #ifndef XILINX_DCACHE_BYTE_SIZE
158 #define XILINX_DCACHE_BYTE_SIZE 32768
164 #define CONFIG_BOOTP_BOOTFILESIZE
165 #define CONFIG_BOOTP_BOOTPATH
166 #define CONFIG_BOOTP_GATEWAY
167 #define CONFIG_BOOTP_HOSTNAME
170 * Command line configuration.
172 #define CONFIG_CMD_IRQ
173 #define CONFIG_CMD_MFSL
176 # define CONFIG_CMD_JFFS2
177 # undef CONFIG_CMD_UBIFS
179 # if !defined(RAMENV)
180 # define CONFIG_CMD_SAVES
184 #if defined(SPIFLASH)
186 # if !defined(RAMENV)
187 # define CONFIG_CMD_SAVES
190 # undef CONFIG_CMD_JFFS2
191 # undef CONFIG_CMD_UBIFS
195 #if defined(CONFIG_CMD_JFFS2)
196 # define CONFIG_MTD_PARTITIONS
199 #if defined(CONFIG_CMD_UBIFS)
203 #if defined(CONFIG_CMD_UBI)
204 # define CONFIG_MTD_PARTITIONS
205 # define CONFIG_RBTREE
208 #if defined(CONFIG_MTD_PARTITIONS)
210 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */
211 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
212 #define CONFIG_FLASH_CFI_MTD
213 #define MTDIDS_DEFAULT "nor0=flash-0"
215 /* default mtd partition table */
216 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\
217 "256k(env),3m(kernel),1m(romfs),"\
218 "1m(cramfs),-(jffs2)"
221 /* size of console buffer */
222 #define CONFIG_SYS_CBSIZE 512
223 /* print buffer size */
224 #define CONFIG_SYS_PBSIZE \
225 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
226 /* max number of command args */
227 #define CONFIG_SYS_MAXARGS 15
228 #define CONFIG_SYS_LONGHELP
229 /* default load address */
230 #define CONFIG_SYS_LOAD_ADDR 0
232 #define CONFIG_BOOTARGS "root=romfs"
233 #define CONFIG_HOSTNAME XILINX_BOARD_NAME
234 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
236 /* architecture dependent code */
237 #define CONFIG_SYS_USR_EXCEP /* user exception */
239 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo"
241 #ifndef CONFIG_EXTRA_ENV_SETTINGS
242 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \
244 "mtdparts=mtdparts=flash-0:"\
245 "256k(u-boot),256k(env),3m(kernel),"\
246 "1m(romfs),1m(cramfs),-(jffs2)\0"\
247 "nc=setenv stdout nc;"\
248 "setenv stdin nc\0" \
249 "serial=setenv stdout serial;"\
250 "setenv stdin serial\0"
253 #define CONFIG_CMDLINE_EDITING
255 /* Enable flat device tree support */
258 #if defined(CONFIG_XILINX_AXIEMAC)
259 # define CONFIG_MII 1
260 # define CONFIG_PHY_GIGE 1
261 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
262 # define CONFIG_PHY_ATHEROS 1
263 # define CONFIG_PHY_BROADCOM 1
264 # define CONFIG_PHY_DAVICOM 1
265 # define CONFIG_PHY_LXT 1
266 # define CONFIG_PHY_MARVELL 1
267 # define CONFIG_PHY_MICREL 1
268 # define CONFIG_PHY_MICREL_KSZ9021
269 # define CONFIG_PHY_NATSEMI 1
270 # define CONFIG_PHY_REALTEK 1
271 # define CONFIG_PHY_VITESSE 1
277 #define CONFIG_CMD_SPL
278 #define CONFIG_SPL_FRAMEWORK
279 #define CONFIG_SPL_BOARD_INIT
281 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds"
283 #ifdef CONFIG_SYS_FLASH_BASE
284 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
287 /* for booting directly linux */
289 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
291 #define CONFIG_SYS_FDT_SIZE (16<<10)
292 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
295 /* SP location before relocation, must use scratch RAM */
297 #define CONFIG_SYS_INIT_RAM_ADDR 0x0
298 /* BRAM size - will be generated */
299 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000
301 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
302 CONFIG_SYS_INIT_RAM_SIZE - \
303 CONFIG_SYS_MALLOC_F_LEN)
305 /* Just for sure that there is a space for stack */
306 #define CONFIG_SPL_STACK_SIZE 0x100
308 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
310 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
311 CONFIG_SYS_INIT_RAM_ADDR - \
312 CONFIG_SYS_MALLOC_F_LEN - \
313 CONFIG_SPL_STACK_SIZE)
315 #endif /* __CONFIG_H */