2 * (C) Copyright 2007-2010 Michal Simek
4 * Michal SIMEK <monstr@monstr.eu>
6 * SPDX-License-Identifier: GPL-2.0+
12 #include "../board/xilinx/microblaze-generic/xparameters.h"
15 #define MICROBLAZE_V5 1
17 /* linear and spi flash memory */
18 #ifdef XILINX_FLASH_START
21 #undef RAMENV /* hold environment in flash */
23 #ifdef XILINX_SPI_FLASH_BASEADDR
26 #undef RAMENV /* hold environment in flash */
30 #define RAMENV /* hold environment in RAM */
35 # define CONFIG_BAUDRATE 115200
36 /* The following table includes the supported baudrates */
37 # define CONFIG_SYS_BAUDRATE_TABLE \
38 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
40 /* setting reset address */
41 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
44 #ifdef XILINX_GPIO_BASEADDR
45 # define CONFIG_XILINX_GPIO
46 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
48 #define CONFIG_BOARD_LATE_INIT
50 /* interrupt controller */
51 #ifdef XILINX_INTC_BASEADDR
52 # define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
53 # define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
57 #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ)
58 # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
59 # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
63 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
64 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
65 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ
66 # ifndef CONFIG_SPL_BUILD
67 # define CONFIG_HW_WATCHDOG
68 # define CONFIG_XILINX_TB_WATCHDOG
72 #define CONFIG_SYS_MALLOC_LEN 0xC0000
74 /* Stack location before relocation */
75 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \
76 CONFIG_SYS_MALLOC_F_LEN)
79 * CFI flash memory layout - Example
80 * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
81 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB
83 * SECT_SIZE = 0x20000; 128kB is one sector
84 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store
86 * 0x2200_0000 CONFIG_SYS_FLASH_BASE
88 * 0x2204_0000 CONFIG_ENV_ADDR
92 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
97 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
98 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
99 # define CONFIG_SYS_FLASH_CFI 1
100 # define CONFIG_FLASH_CFI_DRIVER 1
102 # define CONFIG_SYS_FLASH_EMPTY_INFO 1
103 /* max number of memory banks */
104 # define CONFIG_SYS_MAX_FLASH_BANKS 1
105 /* max number of sectors on one chip */
106 # define CONFIG_SYS_MAX_FLASH_SECT 512
107 /* hardware flash protection */
108 # define CONFIG_SYS_FLASH_PROTECTION
109 /* use buffered writes (20x faster) */
110 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
112 # define CONFIG_ENV_IS_NOWHERE 1
113 # define CONFIG_ENV_SIZE 0x1000
114 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
116 # else /* FLASH && !RAMENV */
117 # define CONFIG_ENV_IS_IN_FLASH 1
118 /* 128K(one sector) for env */
119 # define CONFIG_ENV_SECT_SIZE 0x20000
120 # define CONFIG_ENV_ADDR \
121 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
122 # define CONFIG_ENV_SIZE 0x20000
123 # endif /* FLASH && !RAMBOOT */
127 # define CONFIG_SYS_NO_FLASH 1
128 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR
129 # define CONFIG_SPI 1
130 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
131 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ
132 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS
135 # define CONFIG_ENV_IS_NOWHERE 1
136 # define CONFIG_ENV_SIZE 0x1000
137 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
139 # else /* SPIFLASH && !RAMENV */
140 # define CONFIG_ENV_IS_IN_SPI_FLASH 1
141 # define CONFIG_ENV_SPI_MODE SPI_MODE_3
142 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
143 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
144 /* 128K(two sectors) for env */
145 # define CONFIG_ENV_SECT_SIZE 0x10000
146 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE)
147 /* Warning: adjust the offset in respect of other flash content and size */
148 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
149 # endif /* SPIFLASH && !RAMBOOT */
150 #else /* !SPIFLASH */
153 # define CONFIG_SYS_NO_FLASH 1
154 # define CONFIG_ENV_IS_NOWHERE 1
155 # define CONFIG_ENV_SIZE 0x1000
156 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
157 #endif /* !SPIFLASH */
160 #if defined(XILINX_USE_ICACHE)
161 # define CONFIG_ICACHE
163 # undef CONFIG_ICACHE
166 #if defined(XILINX_USE_DCACHE)
167 # define CONFIG_DCACHE
169 # undef CONFIG_DCACHE
172 #ifndef XILINX_DCACHE_BYTE_SIZE
173 #define XILINX_DCACHE_BYTE_SIZE 32768
179 #define CONFIG_BOOTP_BOOTFILESIZE
180 #define CONFIG_BOOTP_BOOTPATH
181 #define CONFIG_BOOTP_GATEWAY
182 #define CONFIG_BOOTP_HOSTNAME
185 * Command line configuration.
187 #define CONFIG_CMD_ASKENV
188 #define CONFIG_CMD_IRQ
189 #define CONFIG_CMD_MFSL
191 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
192 # define CONFIG_CMD_CACHE
194 # undef CONFIG_CMD_CACHE
198 # define CONFIG_CMD_JFFS2
199 # define CONFIG_CMD_UBI
200 # undef CONFIG_CMD_UBIFS
202 # if !defined(RAMENV)
203 # define CONFIG_CMD_SAVES
207 #if defined(SPIFLASH)
208 # define CONFIG_CMD_SF
210 # if !defined(RAMENV)
211 # define CONFIG_CMD_SAVES
214 # undef CONFIG_CMD_JFFS2
215 # undef CONFIG_CMD_UBI
216 # undef CONFIG_CMD_UBIFS
220 #if defined(CONFIG_CMD_JFFS2)
221 # define CONFIG_MTD_PARTITIONS
224 #if defined(CONFIG_CMD_UBIFS)
225 # define CONFIG_CMD_UBI
229 #if defined(CONFIG_CMD_UBI)
230 # define CONFIG_MTD_PARTITIONS
231 # define CONFIG_RBTREE
234 #if defined(CONFIG_MTD_PARTITIONS)
236 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */
237 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
238 #define CONFIG_FLASH_CFI_MTD
239 #define MTDIDS_DEFAULT "nor0=flash-0"
241 /* default mtd partition table */
242 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\
243 "256k(env),3m(kernel),1m(romfs),"\
244 "1m(cramfs),-(jffs2)"
247 /* size of console buffer */
248 #define CONFIG_SYS_CBSIZE 512
249 /* print buffer size */
250 #define CONFIG_SYS_PBSIZE \
251 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
252 /* max number of command args */
253 #define CONFIG_SYS_MAXARGS 15
254 #define CONFIG_SYS_LONGHELP
255 /* default load address */
256 #define CONFIG_SYS_LOAD_ADDR 0
258 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
259 #define CONFIG_BOOTARGS "root=romfs"
260 #define CONFIG_HOSTNAME XILINX_BOARD_NAME
261 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
262 #define CONFIG_IPADDR 192.168.0.3
263 #define CONFIG_SERVERIP 192.168.0.5
264 #define CONFIG_GATEWAYIP 192.168.0.1
266 /* architecture dependent code */
267 #define CONFIG_SYS_USR_EXCEP /* user exception */
269 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo"
271 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \
273 "mtdparts=mtdparts=flash-0:"\
274 "256k(u-boot),256k(env),3m(kernel),"\
275 "1m(romfs),1m(cramfs),-(jffs2)\0"\
276 "nc=setenv stdout nc;"\
277 "setenv stdin nc\0" \
278 "serial=setenv stdout serial;"\
279 "setenv stdin serial\0"
281 #define CONFIG_CMDLINE_EDITING
283 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
285 /* Enable flat device tree support */
288 #if defined(CONFIG_XILINX_AXIEMAC)
289 # define CONFIG_MII 1
290 # define CONFIG_CMD_MII 1
291 # define CONFIG_PHY_GIGE 1
292 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
293 # define CONFIG_PHY_ATHEROS 1
294 # define CONFIG_PHY_BROADCOM 1
295 # define CONFIG_PHY_DAVICOM 1
296 # define CONFIG_PHY_LXT 1
297 # define CONFIG_PHY_MARVELL 1
298 # define CONFIG_PHY_MICREL 1
299 # define CONFIG_PHY_MICREL_KSZ9021
300 # define CONFIG_PHY_NATSEMI 1
301 # define CONFIG_PHY_REALTEK 1
302 # define CONFIG_PHY_VITESSE 1
305 # undef CONFIG_CMD_MII
309 #define CONFIG_CMD_SPL
310 #define CONFIG_SPL_FRAMEWORK
311 #define CONFIG_SPL_LIBCOMMON_SUPPORT
312 #define CONFIG_SPL_LIBGENERIC_SUPPORT
313 #define CONFIG_SPL_SERIAL_SUPPORT
314 #define CONFIG_SPL_BOARD_INIT
316 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds"
318 #define CONFIG_SPL_RAM_DEVICE
319 #ifdef CONFIG_SYS_FLASH_BASE
320 # define CONFIG_SPL_NOR_SUPPORT
321 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
324 /* for booting directly linux */
325 #define CONFIG_SPL_OS_BOOT
327 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + \
329 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
331 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
334 /* SP location before relocation, must use scratch RAM */
336 #define CONFIG_SYS_INIT_RAM_ADDR 0x0
337 /* BRAM size - will be generated */
338 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000
340 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
341 CONFIG_SYS_INIT_RAM_SIZE - \
342 CONFIG_SYS_MALLOC_F_LEN)
344 /* Just for sure that there is a space for stack */
345 #define CONFIG_SPL_STACK_SIZE 0x100
347 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
349 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
350 CONFIG_SYS_INIT_RAM_ADDR - \
351 CONFIG_SYS_MALLOC_F_LEN - \
352 CONFIG_SPL_STACK_SIZE)
354 #endif /* __CONFIG_H */