include/configs/mcx.h

   1 /*
   2  * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
   3  *
   4  * Based on omap3_evm_config.h
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 /*
  13  * High Level Configuration Options
  14  */
  15 #define CONFIG_OMAP                     /* in a TI OMAP core */
  16 #define CONFIG_OMAP3_MCX                /* working with mcx */
  17 #define CONFIG_OMAP_GPIO
  18 #define CONFIG_OMAP_COMMON
  19 /* Common ARM Erratas */
  20 #define CONFIG_ARM_ERRATA_454179
  21 #define CONFIG_ARM_ERRATA_430973
  22 #define CONFIG_ARM_ERRATA_621766
  23
  24 #define MACH_TYPE_MCX                   3656
  25 #define CONFIG_MACH_TYPE        MACH_TYPE_MCX
  26 #define CONFIG_BOARD_LATE_INIT
  27
  28 #define CONFIG_SYS_GENERIC_BOARD
  29
  30 #define CONFIG_SYS_CACHELINE_SIZE       64
  31
  32 #define CONFIG_EMIF4    /* The chip has EMIF4 controller */
  33
  34 #include <asm/arch/cpu.h>               /* get chip and board defs */
  35 #include <asm/arch/omap.h>
  36
  37 #define CONFIG_OF_LIBFDT
  38 #define CONFIG_FIT
  39
  40 /*
  41  * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
  42  * and older u-boot.bin with the new U-Boot SPL.
  43  */
  44 #define CONFIG_SYS_TEXT_BASE            0x80008000
  45
  46 /*
  47  * Display CPU and Board information
  48  */
  49 #define CONFIG_DISPLAY_CPUINFO
  50 #define CONFIG_DISPLAY_BOARDINFO
  51
  52 /* Clock Defines */
  53 #define V_OSCK                  26000000        /* Clock output from T2 */
  54 #define V_SCLK                  (V_OSCK >> 1)
  55
  56 #define CONFIG_MISC_INIT_R
  57
  58 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
  59 #define CONFIG_SETUP_MEMORY_TAGS
  60 #define CONFIG_INITRD_TAG
  61 #define CONFIG_REVISION_TAG
  62
  63 /*
  64  * Size of malloc() pool
  65  */
  66 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB sector */
  67 #define CONFIG_SYS_MALLOC_LEN           (1024 << 10)
  68 /*
  69  * DDR related
  70  */
  71 #define CONFIG_SYS_CS0_SIZE             (256 * 1024 * 1024)
  72
  73 /*
  74  * Hardware drivers
  75  */
  76
  77 /*
  78  * NS16550 Configuration
  79  */
  80 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  81
  82 #define CONFIG_SYS_NS16550
  83 #define CONFIG_SYS_NS16550_SERIAL
  84 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  85 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  86
  87 /*
  88  * select serial console configuration
  89  */
  90 #define CONFIG_CONS_INDEX               3
  91 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  92 #define CONFIG_SERIAL3                  3       /* UART3 */
  93
  94 /* allow to overwrite serial and ethaddr */
  95 #define CONFIG_ENV_OVERWRITE
  96 #define CONFIG_BAUDRATE                 115200
  97 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  98                                         115200}
  99 #define CONFIG_MMC
 100 #define CONFIG_OMAP_HSMMC
 101 #define CONFIG_GENERIC_MMC
 102 #define CONFIG_DOS_PARTITION
 103
 104 /* EHCI */
 105 #define CONFIG_USB_STORAGE
 106 #define CONFIG_OMAP3_GPIO_2
 107 #define CONFIG_OMAP3_GPIO_5
 108 #define CONFIG_USB_EHCI
 109 #define CONFIG_USB_EHCI_OMAP
 110 #define CONFIG_USB_ULPI
 111 #define CONFIG_USB_ULPI_VIEWPORT_OMAP
 112 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO        57
 113 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
 114
 115 /* commands to include */
 116 #include <config_cmd_default.h>
 117
 118 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 119 #define CONFIG_CMD_FAT          /* FAT support                  */
 120 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
 121
 122 #define CONFIG_CMD_DATE
 123 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 124 #define CONFIG_CMD_MMC          /* MMC support                  */
 125 #define CONFIG_CMD_FAT          /* FAT support                  */
 126 #define CONFIG_CMD_USB
 127 #define CONFIG_CMD_NAND         /* NAND support                 */
 128 #define CONFIG_CMD_DHCP
 129 #define CONFIG_CMD_PING
 130 #define CONFIG_CMD_CACHE
 131 #define CONFIG_CMD_UBI
 132 #define CONFIG_CMD_UBIFS
 133 #define CONFIG_RBTREE
 134 #define CONFIG_LZO
 135 #define CONFIG_MTD_PARTITIONS
 136 #define CONFIG_MTD_DEVICE
 137 #define CONFIG_CMD_MTDPARTS
 138 #define CONFIG_CMD_GPIO
 139
 140 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 141 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
 142 #undef CONFIG_CMD_IMI           /* iminfo                       */
 143 #undef CONFIG_CMD_IMLS          /* List all found images        */
 144
 145 #define CONFIG_SYS_NO_FLASH
 146 #define CONFIG_SYS_I2C
 147 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
 148 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 149 #define CONFIG_SYS_I2C_OMAP34XX
 150
 151 /* RTC */
 152 #define CONFIG_RTC_DS1337
 153 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 154
 155 #define CONFIG_CMD_NET
 156 #define CONFIG_CMD_MII
 157 #define CONFIG_CMD_NFS
 158 /*
 159  * Board NAND Info.
 160  */
 161 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 162                                                         /* to access nand */
 163 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 164                                                         /* to access */
 165                                                         /* nand at CS0 */
 166
 167 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of */
 168                                                         /* NAND devices */
 169 #define CONFIG_JFFS2_NAND
 170 /* nand device jffs2 lives on */
 171 #define CONFIG_JFFS2_DEV                "nand0"
 172 /* start of jffs2 partition */
 173 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 174 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* sz of jffs2 part */
 175
 176 /* Environment information */
 177 #define CONFIG_BOOTDELAY        3
 178
 179 #define CONFIG_BOOTFILE         "uImage"
 180
 181 /* Setup MTD for NAND on the SOM */
 182 #define MTDIDS_DEFAULT          "nand0=omap2-nand.0"
 183 #define MTDPARTS_DEFAULT        "mtdparts=omap2-nand.0:512k(MLO),"      \
 184                                 "1m(u-boot),256k(env1),"                \
 185                                 "256k(env2),6m(kernel),6m(k_recovery)," \
 186                                 "8m(fs_recovery),-(common_data)"
 187
 188 #define CONFIG_HOSTNAME mcx
 189 #define CONFIG_EXTRA_ENV_SETTINGS \
 190         "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0"       \
 191         "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0"     \
 192         "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"       \
 193         "addfb=setenv bootargs ${bootargs} vram=6M "                    \
 194                 "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0"     \
 195         "addip_sta=setenv bootargs ${bootargs} "                        \
 196                 "ip=${ipaddr}:${serverip}:${gatewayip}:"                \
 197                 "${netmask}:${hostname}:eth0:off\0"                     \
 198         "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"               \
 199         "addip=if test -n ${ipdyn};then run addip_dyn;"                 \
 200                 "else run addip_sta;fi\0"                               \
 201         "addmisc=setenv bootargs ${bootargs} ${misc}\0"                 \
 202         "addtty=setenv bootargs ${bootargs} "                           \
 203                 "console=${consoledev},${baudrate}\0"                   \
 204         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 205         "baudrate=115200\0"                                             \
 206         "consoledev=ttyO2\0"                                            \
 207         "hostname=" __stringify(CONFIG_HOSTNAME) "\0"                   \
 208         "loadaddr=0x82000000\0"                                         \
 209         "load=tftp ${loadaddr} ${u-boot}\0"                             \
 210         "load_k=tftp ${loadaddr} ${bootfile}\0"                         \
 211         "loaduimage=fatload mmc 0 ${loadaddr} uImage\0"                 \
 212         "loadmlo=tftp ${loadaddr} ${mlo}\0"                             \
 213         "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0"                    \
 214         "mmcargs=root=/dev/mmcblk0p2 rw "                               \
 215                 "rootfstype=ext3 rootwait\0"                            \
 216         "mmcboot=echo Booting from mmc ...; "                           \
 217                 "run mmcargs; "                                         \
 218                 "run addip addtty addmtd addfb addeth addmisc;"         \
 219                 "run loaduimage; "                                      \
 220                 "bootm ${loadaddr}\0"                                   \
 221         "net_nfs=run load_k; "                                          \
 222                 "run nfsargs; "                                         \
 223                 "run addip addtty addmtd addfb addeth addmisc;"         \
 224                 "bootm ${loadaddr}\0"                                   \
 225         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 226                 "nfsroot=${serverip}:${rootpath}\0"                     \
 227         "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0"          \
 228         "uboot_addr=0x80000\0"                                          \
 229         "update=nandecc sw;nand erase ${uboot_addr} 100000;"            \
 230                 "nand write ${loadaddr} ${uboot_addr} 80000\0"          \
 231         "updatemlo=nandecc hw;nand erase 0 20000;"                      \
 232                 "nand write ${loadaddr} 0 20000\0"                      \
 233         "upd=if run load;then echo Updating u-boot;if run update;"      \
 234                 "then echo U-Boot updated;"                             \
 235                         "else echo Error updating u-boot !;"            \
 236                         "echo Board without bootloader !!;"             \
 237                 "fi;"                                                   \
 238                 "else echo U-Boot not downloaded..exiting;fi\0"         \
 239         "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0"           \
 240         "bootscript=echo Running bootscript from mmc ...; "             \
 241                 "source ${loadaddr}\0"                                  \
 242         "nandargs=setenv bootargs ubi.mtd=7 "                           \
 243                 "root=ubi0:rootfs rootfstype=ubifs\0"                   \
 244         "nandboot=echo Booting from nand ...; "                         \
 245                 "run nandargs; "                                        \
 246                 "ubi part nand0,4;"                                     \
 247                 "ubi readvol ${loadaddr} kernel;"                       \
 248                 "run addtty addmtd addfb addeth addmisc;"               \
 249                 "bootm ${loadaddr}\0"                                   \
 250         "preboot=ubi part nand0,7;"                                     \
 251                 "ubi readvol ${loadaddr} splash;"                       \
 252                 "bmp display ${loadaddr};"                              \
 253                 "gpio set 55\0"                                         \
 254         "swupdate_args=setenv bootargs root=/dev/ram "                  \
 255                 "quiet loglevel=1 "                                     \
 256                 "consoleblank=0 ${swupdate_misc}\0"                     \
 257         "swupdate=echo Running Sw-Update...;"                           \
 258                 "if printenv mtdparts;then echo Starting SwUpdate...; " \
 259                 "else mtdparts default;fi; "                            \
 260                 "ubi part nand0,5;"                                     \
 261                 "ubi readvol 0x82000000 kernel_recovery;"               \
 262                 "ubi part nand0,6;"                                     \
 263                 "ubi readvol 0x84000000 fs_recovery;"                   \
 264                 "run swupdate_args; "                                   \
 265                 "setenv bootargs ${bootargs} "                          \
 266                         "${mtdparts} "                                  \
 267                         "vram=6M omapfb.vram=1:2M,2:2M,3:2M "           \
 268                         "omapdss.def_disp=lcd;"                         \
 269                 "bootm 0x82000000 0x84000000\0"                         \
 270         "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \
 271                 "then source 82000000;else run nandboot;fi\0"
 272
 273 #define CONFIG_AUTO_COMPLETE
 274 #define CONFIG_CMDLINE_EDITING
 275
 276 /*
 277  * Miscellaneous configurable options
 278  */
 279 #define V_PROMPT                        "mcx # "
 280
 281 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 282 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 283 #define CONFIG_SYS_PROMPT               V_PROMPT
 284 #define CONFIG_SYS_CBSIZE               1024/* Console I/O Buffer Size */
 285 /* Print Buffer Size */
 286 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 287                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 288 #define CONFIG_SYS_MAXARGS              16      /* max number of command */
 289                                                 /* args */
 290 /* Boot Argument Buffer Size */
 291 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 292 /* memtest works on */
 293 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 294 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 295                                         0x01F00000) /* 31MB */
 296
 297 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
 298                                                                 /* address */
 299 #define CONFIG_PREBOOT
 300
 301 /*
 302  * AM3517 has 12 GP timers, they can be driven by the system clock
 303  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 304  * This rate is divided by a local divisor.
 305  */
 306 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 307 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 308
 309 /*
 310  * Physical Memory Map
 311  */
 312 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 313 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 314 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 315
 316 /*
 317  * FLASH and environment organization
 318  */
 319
 320 /* **** PISMO SUPPORT *** */
 321 #define CONFIG_NAND_OMAP_GPMC
 322 #define CONFIG_ENV_IS_IN_NAND
 323 #define SMNAND_ENV_OFFSET               0x180000 /* environment starts here */
 324
 325 /* Redundant Environment */
 326 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 327 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 328 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 329 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + \
 330                                                 2 * CONFIG_SYS_ENV_SECT_SIZE)
 331 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 332
 333 /* Flash banks JFFS2 should use */
 334 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 335                                         CONFIG_SYS_MAX_NAND_DEVICE)
 336 #define CONFIG_SYS_JFFS2_MEM_NAND
 337 /* use flash_info[2] */
 338 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 339 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 340
 341 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 342 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 343 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 344 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 345                                          CONFIG_SYS_INIT_RAM_SIZE - \
 346                                          GENERATED_GBL_DATA_SIZE)
 347
 348 /* Defines for SPL */
 349 #define CONFIG_SPL_FRAMEWORK
 350 #define CONFIG_SPL_BOARD_INIT
 351 #define CONFIG_SPL_NAND_SIMPLE
 352
 353 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 354 #define CONFIG_SPL_LIBDISK_SUPPORT
 355 #define CONFIG_SPL_I2C_SUPPORT
 356 #define CONFIG_SPL_MMC_SUPPORT
 357 #define CONFIG_SPL_FAT_SUPPORT
 358 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 359 #define CONFIG_SPL_SERIAL_SUPPORT
 360 #define CONFIG_SPL_POWER_SUPPORT
 361 #define CONFIG_SPL_NAND_SUPPORT
 362 #define CONFIG_SPL_NAND_BASE
 363 #define CONFIG_SPL_NAND_DRIVERS
 364 #define CONFIG_SPL_NAND_ECC
 365 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 366
 367 #define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
 368 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)     /* 8 KB for stack */
 369 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
 370
 371 /* move malloc and bss high to prevent clashing with the main image */
 372 #define CONFIG_SYS_SPL_MALLOC_START     0x8f000000
 373 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 374 #define CONFIG_SPL_BSS_START_ADDR       0x8f080000 /* end of RAM */
 375 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 376
 377 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 378 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
 379 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
 380
 381 /* NAND boot config */
 382 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 383 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 384 #define CONFIG_SYS_NAND_OOBSIZE         64
 385 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 386 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 387 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
 388 #define CONFIG_SYS_NAND_ECCPOS          {40, 41, 42, 43, 44, 45, 46, 47,\
 389                                          48, 49, 50, 51, 52, 53, 54, 55,\
 390                                          56, 57, 58, 59, 60, 61, 62, 63}
 391 #define CONFIG_SYS_NAND_ECCSIZE         256
 392 #define CONFIG_SYS_NAND_ECCBYTES        3
 393 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_SW
 394 #define CONFIG_SPL_NAND_SOFTECC
 395
 396 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 397
 398 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 399
 400 /*
 401  * ethernet support
 402  *
 403  */
 404 #if defined(CONFIG_CMD_NET)
 405 #define CONFIG_DRIVER_TI_EMAC
 406 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 407 #define CONFIG_MII
 408 #define CONFIG_BOOTP_DNS
 409 #define CONFIG_BOOTP_DNS2
 410 #define CONFIG_BOOTP_SEND_HOSTNAME
 411 #define CONFIG_NET_RETRY_COUNT 10
 412 #endif
 413
 414 #define CONFIG_VIDEO
 415 #define CONFIG_CFB_CONSOLE
 416 #define CONFIG_VGA_AS_SINGLE_DEVICE
 417 #define CONFIG_SPLASH_SCREEN
 418 #define CONFIG_VIDEO_BMP_RLE8
 419 #define CONFIG_CMD_BMP
 420 #define CONFIG_VIDEO_OMAP3
 421 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 422
 423 #endif /* __CONFIG_H */