1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2016-2017
4 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
10 #include "mx6_common.h"
12 #define CONFIG_SPL_LIBCOMMON_SUPPORT
15 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
16 #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x80000)
17 #define CONFIG_SPL_OS_BOOT
18 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + 0x180000)
19 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + 0x1980000)
20 #define CONFIG_SYS_FDT_SIZE (48 * SZ_1K)
21 #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
24 * Below defines are set but NOT really used since we by
25 * design force U-Boot run when we boot in development
26 * mode from SD card (SD2)
28 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR (0x800)
29 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (0x80)
30 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR (0x1000)
31 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
32 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "imx6q-mccmon.dtb"
34 /* Size of malloc() pool */
35 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
37 #define CONFIG_BOARD_EARLY_INIT_F
38 #define CONFIG_BOARD_LATE_INIT
40 #define CONFIG_MXC_UART
41 #define CONFIG_MXC_UART_BASE UART1_BASE
43 #define CONFIG_SYS_MEMTEST_START 0x10000000
44 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
46 #define CONFIG_SF_DEFAULT_BUS 2
47 #define CONFIG_SF_DEFAULT_CS 0
48 #define CONFIG_SF_DEFAULT_SPEED 25000000
49 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
52 #define CONFIG_SYS_I2C
53 #define CONFIG_SYS_I2C_MXC
54 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
55 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
56 #define CONFIG_SYS_I2C_SPEED 100000
58 /* MMC Configuration */
59 #define CONFIG_SYS_FSL_USDHC_NUM 2
60 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
63 #define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR
64 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
65 #define CONFIG_SYS_FLASH_EMPTY_INFO
66 #define CONFIG_FLASH_VERIFY
69 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
70 #define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
71 #define CONFIG_SYS_FLASH_BANKS_SIZES { (32 * SZ_1M) }
76 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
77 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
78 #define CONFIG_MXC_USB_FLAGS 0
80 /* Ethernet Configuration */
81 #define CONFIG_FEC_MXC
82 #define IMX_FEC_BASE ENET_BASE_ADDR
83 #define CONFIG_FEC_XCV_TYPE RGMII
84 #define CONFIG_ETHPRIME "FEC"
85 #define CONFIG_FEC_MXC_PHYADDR 1
87 #define CONFIG_EXTRA_ENV_SETTINGS \
88 "console=ttymxc0,115200 quiet\0" \
89 "fdtfile=imx6q-mccmon6.dtb\0" \
90 "fdt_high=0xffffffff\0" \
91 "initrd_high=0xffffffff\0" \
94 "tftpboot ${kernel_addr} ${kernel_file};" \
95 "tftpboot ${fdt_addr} ${fdtfile};\0" \
97 "setenv boot_medium nor;" \
98 "setexpr.l _src_sbmr1 *0x020d8004;" \
99 "setexpr _b_medium ${_src_sbmr1} '&' 0x00000040;" \
100 "if test ${_b_medium} = 40; then " \
101 "setenv boot_medium sdcard;" \
103 "kernel_file=uImage\0" \
105 "load mmc ${bootdev}:${bootpart} ${kernel_addr} uImage;" \
106 "load mmc ${bootdev}:${bootpart} ${fdt_addr} ${fdtfile};\0" \
108 "echo '#######################';" \
109 "echo '# Factory SDcard Boot #';" \
110 "echo '#######################';" \
112 "setenv mmcfactorydev 0;" \
113 "setenv mmcfactorypart 1;" \
114 "run factory_flash_img;\0" \
116 "setenv kernelnor 0x08180000;" \
117 "setenv dtbnor 0x09980000;" \
118 "setenv bootargs console=${console} " \
119 CONFIG_MTDPARTS_DEFAULT " " \
120 "root=/dev/mmcblk1 rootfstype=ext4 rw rootwait noinitrd;" \
121 "cp.l ${dtbnor} ${dtbloadaddr} 0x8000;" \
122 "bootm ${kernelnor} - ${dtbloadaddr};\0" \
124 "echo '#######################';" \
125 "echo '# RECOVERY SWU Boot #';" \
126 "echo '#######################';" \
127 "setenv rootfsloadaddr 0x13000000;" \
128 "setenv swukernelnor 0x08980000;" \
129 "setenv swurootfsnor 0x09180000;" \
130 "setenv swudtbnor 0x099A0000;" \
131 "setenv bootargs console=${console} " \
132 CONFIG_MTDPARTS_DEFAULT " " \
133 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
134 ":${hostname}::off root=/dev/ram rw;" \
135 "cp.l ${swurootfsnor} ${rootfsloadaddr} 0x200000;" \
136 "cp.l ${swudtbnor} ${dtbloadaddr} 0x8000;" \
137 "bootm ${swukernelnor} ${rootfsloadaddr} ${dtbloadaddr};\0" \
139 "echo '#######################';" \
140 "echo '# TFTP Boot #';" \
141 "echo '#######################';" \
142 "if run download_kernel; then " \
143 "setenv bootargs console=${console} " \
144 "root=/dev/mmcblk0p2 rootwait;" \
145 "bootm ${kernel_addr} - ${fdt_addr};" \
148 "if test -n ${recovery_status}; then " \
149 "run boot_recovery;" \
151 "if test ! -n ${boot_medium}; then " \
152 "run get_boot_medium;" \
153 "if test ${boot_medium} = sdcard; then " \
159 "if test ${boot_medium} = tftp; then " \
164 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
165 "fdt_addr=0x18000000\0" \
168 "kernel_addr=" __stringify(CONFIG_LOADADDR) "\0" \
170 "load_addr=0x11000000\0" \
171 "dtbloadaddr=0x12000000\0" \
172 "uboot_file=u-boot.img\0" \
174 "load_uboot=tftp ${load_addr} ${uboot_file}\0" \
175 "nor_img_addr=0x11000000\0" \
176 "nor_img_file=core-image-lwn-mccmon6.nor\0" \
177 "emmc_img_file=core-image-lwn-mccmon6.ext4\0" \
178 "nor_bank_start=" __stringify(CONFIG_SYS_FLASH_BASE) "\0" \
179 "nor_img_size=0x02000000\0" \
180 "factory_script_file=factory.scr\0" \
181 "factory_load_script=" \
182 "if test -e mmc ${mmcdev}:${mmcfactorypart} " \
183 "${factory_script_file}; then " \
184 "load mmc ${mmcdev}:${mmcfactorypart} " \
185 "${loadaddr} ${factory_script_file};" \
187 "factory_script=echo Running factory script from mmc${mmcdev} ...; " \
188 "source ${loadaddr}\0" \
189 "factory_flash_img="\
190 "echo 'Flash mccmon6 with factory images'; " \
191 "if run factory_load_script; then " \
192 "run factory_script;" \
194 "echo No factory script: ${factory_script_file} found on " \
195 "device ${mmcdev};" \
196 "run factory_nor_img;" \
197 "run factory_eMMC_img;" \
200 "echo 'Update mccmon6 eMMC image'; " \
201 "if load mmc ${mmcdev}:${mmcfactorypart} " \
202 "${loadaddr} ${emmc_img_file}; then " \
203 "setexpr fw_sz ${filesize} / 0x200;" \
204 "setexpr fw_sz ${fw_sz} + 1;" \
205 "mmc dev ${mmcfactorydev};" \
206 "mmc write ${loadaddr} 0x0 ${fw_sz};" \
209 "echo 'Update mccmon6 NOR image'; " \
210 "if load mmc ${mmcdev}:${mmcfactorypart} " \
211 "${nor_img_addr} ${nor_img_file}; then " \
215 "protect off ${nor_bank_start} +${nor_img_size};" \
216 "erase ${nor_bank_start} +${nor_img_size};" \
217 "setexpr nor_img_size ${nor_img_size} / 4; " \
218 "cp.l ${nor_img_addr} ${nor_bank_start} ${nor_img_size}\0" \
220 "echo 'Update mccmon6 NOR U-BOOT via TFTP'; " \
221 "setenv nor_img_file u-boot.img; " \
222 "setenv nor_img_size 0x80000; " \
223 "setenv nor_bank_start 0x08080000; " \
224 "if tftpboot ${nor_img_addr} ${nor_img_file}; then " \
228 "echo 'Update mccmon6 NOR uImage via TFTP'; " \
229 "setenv nor_img_file uImage; " \
230 "setenv nor_img_size 0x500000; " \
231 "setenv nor_bank_start 0x08180000; " \
232 "if tftpboot ${nor_img_addr} ${nor_img_file}; then " \
236 "echo 'Update mccmon6 NOR DTB via TFTP'; " \
237 "setenv nor_img_file imx6q-mccmon6.dtb; " \
238 "setenv nor_img_size 0x20000; " \
239 "setenv nor_bank_start 0x09980000; " \
240 "if tftpboot ${nor_img_addr} ${nor_img_file}; then " \
244 "echo 'Update mccmon6 NOR image via TFTP'; " \
245 "if tftpboot ${nor_img_addr} ${nor_img_file}; then " \
249 "if tftp ${load_addr} SPL_padded; then " \
250 "erase 0x08000000 +0x20000;" \
251 "cp.b ${load_addr} 0x08000000 0x20000;" \
254 "if mmc dev 1; then " \
255 "if tftp ${load_addr} ${SPL_file}; then " \
256 "setexpr fw_sz ${filesize} / 0x200; " \
257 "setexpr fw_sz ${fw_sz} + 1; " \
258 "mmc write ${load_addr} 0x2 ${fw_sz};" \
262 "if mmc dev 1; then " \
263 "if run load_uboot; then " \
264 "setexpr fw_sz ${filesize} / 0x200; " \
265 "setexpr fw_sz ${fw_sz} + 1; " \
266 "mmc write ${load_addr} 0x8A ${fw_sz};" \
270 /* Physical Memory Map */
271 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
273 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
274 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
275 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
277 #define CONFIG_SYS_INIT_SP_OFFSET \
278 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
279 #define CONFIG_SYS_INIT_SP_ADDR \
280 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
282 /* Environment organization */
283 #define CONFIG_ENV_SIZE (SZ_128K)
285 /* Envs are stored in NOR flash */
286 #define CONFIG_ENV_SECT_SIZE (SZ_128K)
287 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000)
289 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
290 #define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + 0x60000)
291 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
293 #endif /* __CONFIG_H * */