1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Menlosystems M53Menlo configuration
5 * Copyright (C) 2012-2017 Marek Vasut <marex@denx.de>
6 * Copyright (C) 2014-2017 Olaf Mandel <o.mandel@menlosystems.com>
9 #ifndef __M53MENLO_CONFIG_H__
10 #define __M53MENLO_CONFIG_H__
12 #include <asm/arch/imx-regs.h>
15 * Memory configurations
17 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
18 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
19 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
20 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
21 #define PHYS_SDRAM_SIZE (gd->ram_size)
23 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
24 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
25 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
27 #define CONFIG_SYS_INIT_SP_OFFSET \
28 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
29 #define CONFIG_SYS_INIT_SP_ADDR \
30 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
33 * U-Boot general configurations
35 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
36 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
37 /* Boot argument buffer size */
42 #define CONFIG_MXC_UART_BASE UART1_BASE
48 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
49 #define CONFIG_SYS_FSL_ESDHC_NUM 1
55 #ifdef CONFIG_CMD_NAND
56 #define CONFIG_SYS_MAX_NAND_DEVICE 1
57 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
58 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
59 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
60 #define CONFIG_SYS_NAND_LARGEPAGE
61 #define CONFIG_MXC_NAND_HWECC
63 /* Environment is in NAND */
64 #define CONFIG_ENV_RANGE (0x00080000) /* 512 KiB */
68 * Ethernet on SOC (FEC)
71 #define CONFIG_FEC_MXC_PHYADDR 0x0
74 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
79 #ifdef CONFIG_CMD_DATE
80 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
81 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
88 #define CONFIG_MXC_USB_PORT 1
89 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
90 #define CONFIG_MXC_USB_FLAGS 0
96 #ifdef CONFIG_CMD_SATA
97 #define CONFIG_DWC_AHSATA_PORT_ID 0
98 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
105 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
108 #define CONFIG_SYS_LDB_CLOCK 33260000
109 #define CONFIG_IMX_VIDEO_SKIP
112 #define CONFIG_FSL_IIM
119 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
120 #define CONFIG_SPL_PAD_TO 0x8000
121 #define CONFIG_SPL_STACK 0x70004000
123 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
128 #define CONFIG_HOSTNAME "m53menlo"
130 #define CONFIG_EXTRA_ENV_SETTINGS \
131 "consdev=ttymxc0\0" \
132 "baudrate=115200\0" \
133 "bootscript=boot.scr\0" \
137 "kernel_addr_r=0x72000000\0" \
138 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
139 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
141 "splashsource=mmc_fs\0" \
142 "splashfile=boot/usplash.bmp.gz\0" \
143 "splashimage=0x88000000\0" \
146 "if test ${mmcpart} -eq 1 ; then " \
147 "setenv mmcpart 2 ; " \
149 "setenv mmcpart 1 ; " \
152 "stdout=serial,vidconsole\0" \
153 "stderr=serial,vidconsole\0" \
155 "setenv bootargs ${bootargs} " \
156 "console=${consdev},${baudrate}\0" \
158 "setenv bootargs ${bootargs} " \
159 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
160 ":${hostname}:${netdev}:off\0" \
161 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
163 "setenv bootargs ${bootargs} ${miscargs}\0" \
164 "addargs=run addcons addmisc addmtd\0" \
166 "mmc rescan || reset ; load mmc ${mmcdev}:${mmcpart} " \
167 "${kernel_addr_r} ${bootfile} || reset\0" \
168 "miscargs=nohlt panic=1\0" \
169 "mmcargs=setenv bootargs root=/dev/mmcblk0p${mmcpart} rw " \
172 "run mmcload mmcargs addargs || reset ; " \
173 "bootm ${kernel_addr_r} ; reset\0" \
174 "netload=tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
176 "run netload nfsargs addip addargs ; " \
177 "bootm ${kernel_addr_r}\0" \
179 "setenv bootargs root=/dev/nfs rw " \
180 "nfsroot=${serverip}:${rootpath}${hostname},v3,tcp\0" \
183 "if test -e mmc 0:1 ${bootscript} ; then " \
184 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
186 "echo Running bootscript... ; " \
187 "source ${kernel_addr_r} ; " \
191 #endif /* __M53MENLO_CONFIG_H__ */