2 * DENX M53 configuration
3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __M53EVK_CONFIG_H__
9 #define __M53EVK_CONFIG_H__
12 #define CONFIG_MXC_GPIO
14 #include <asm/arch/imx-regs.h>
16 #define CONFIG_DISPLAY_CPUINFO
17 #define CONFIG_BOARD_EARLY_INIT_F
18 #define CONFIG_REVISION_TAG
19 #define CONFIG_SYS_NO_FLASH
20 #define CONFIG_SYS_FSL_CLK
22 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
27 #define CONFIG_DISPLAY_BOARDINFO
28 #define CONFIG_DOS_PARTITION
29 #define CONFIG_FAT_WRITE
31 #define CONFIG_CMD_BMP
32 #define CONFIG_CMD_DATE
33 #define CONFIG_CMD_NAND
34 #define CONFIG_CMD_NAND_TRIMFFS
35 #define CONFIG_CMD_SATA
39 * Memory configurations
41 #define CONFIG_NR_DRAM_BANKS 2
42 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
43 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
44 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
45 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
46 #define PHYS_SDRAM_SIZE (gd->ram_size)
47 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
48 #define CONFIG_SYS_MEMTEST_START 0x70000000
49 #define CONFIG_SYS_MEMTEST_END 0x8ff00000
51 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
52 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
53 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
55 #define CONFIG_SYS_INIT_SP_OFFSET \
56 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
57 #define CONFIG_SYS_INIT_SP_ADDR \
58 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
60 #define CONFIG_SYS_TEXT_BASE 0x71000000
63 * U-Boot general configurations
65 #define CONFIG_SYS_LONGHELP
66 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
67 #define CONFIG_SYS_PBSIZE \
68 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
69 /* Print buffer size */
70 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
71 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
72 /* Boot argument buffer size */
73 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
74 #define CONFIG_CMDLINE_EDITING /* Command history etc */
79 #define CONFIG_MXC_UART
80 #define CONFIG_MXC_UART_BASE UART2_BASE
81 #define CONFIG_CONS_INDEX 1
82 #define CONFIG_BAUDRATE 115200
89 #define CONFIG_GENERIC_MMC
90 #define CONFIG_FSL_ESDHC
91 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
92 #define CONFIG_SYS_FSL_ESDHC_NUM 1
98 #define CONFIG_ENV_SIZE (16 * 1024)
99 #ifdef CONFIG_CMD_NAND
100 #define CONFIG_SYS_MAX_NAND_DEVICE 1
101 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
102 #define CONFIG_NAND_MXC
103 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
104 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
105 #define CONFIG_SYS_NAND_LARGEPAGE
106 #define CONFIG_MXC_NAND_HWECC
107 #define CONFIG_SYS_NAND_USE_FLASH_BBT
109 /* Environment is in NAND */
110 #define CONFIG_ENV_IS_IN_NAND
111 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
112 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
113 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE)
114 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */
115 #define CONFIG_ENV_OFFSET_REDUND \
116 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
118 #define CONFIG_CMD_UBI
119 #define CONFIG_CMD_UBIFS
120 #define CONFIG_CMD_MTDPARTS
121 #define CONFIG_RBTREE
123 #define CONFIG_MTD_DEVICE
124 #define CONFIG_MTD_PARTITIONS
125 #define MTDIDS_DEFAULT "nand0=mxc_nand"
126 #define MTDPARTS_DEFAULT \
127 "mtdparts=mxc_nand:" \
135 #define CONFIG_ENV_IS_NOWHERE
139 * Ethernet on SOC (FEC)
141 #ifdef CONFIG_CMD_NET
142 #define CONFIG_FEC_MXC
143 #define IMX_FEC_BASE FEC_BASE_ADDR
144 #define CONFIG_FEC_MXC_PHYADDR 0x0
146 #define CONFIG_DISCOVER_PHY
147 #define CONFIG_FEC_XCV_TYPE RMII
148 #define CONFIG_PHYLIB
149 #define CONFIG_PHY_MICREL
150 #define CONFIG_ETHPRIME "FEC0"
156 #ifdef CONFIG_CMD_I2C
157 #define CONFIG_SYS_I2C
158 #define CONFIG_SYS_I2C_MXC
159 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
160 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
161 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
162 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
168 #ifdef CONFIG_CMD_DATE
169 #define CONFIG_RTC_M41T62
170 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
171 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
177 #ifdef CONFIG_CMD_USB
178 #define CONFIG_USB_EHCI
179 #define CONFIG_USB_EHCI_MX5
180 #define CONFIG_USB_HOST_ETHER
181 #define CONFIG_USB_ETHER_ASIX
182 #define CONFIG_USB_ETHER_MCS7830
183 #define CONFIG_USB_ETHER_SMSC95XX
184 #define CONFIG_MXC_USB_PORT 1
185 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
186 #define CONFIG_MXC_USB_FLAGS 0
192 #ifdef CONFIG_CMD_SATA
193 #define CONFIG_DWC_AHSATA
194 #define CONFIG_SYS_SATA_MAX_DEVICE 1
195 #define CONFIG_DWC_AHSATA_PORT_ID 0
196 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
198 #define CONFIG_LIBATA
205 #define CONFIG_VIDEO_IPUV3
206 #define CONFIG_CFB_CONSOLE
207 #define CONFIG_VGA_AS_SINGLE_DEVICE
208 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
209 #define CONFIG_VIDEO_BMP_RLE8
210 #define CONFIG_VIDEO_BMP_GZIP
211 #define CONFIG_SPLASH_SCREEN
212 #define CONFIG_SPLASHIMAGE_GUARD
213 #define CONFIG_SPLASH_SCREEN_ALIGN
214 #define CONFIG_BMP_16BPP
215 #define CONFIG_VIDEO_LOGO
216 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
217 #define CONFIG_IPUV3_CLK 200000000
223 #define CONFIG_CMDLINE_TAG
224 #define CONFIG_INITRD_TAG
225 #define CONFIG_REVISION_TAG
226 #define CONFIG_SETUP_MEMORY_TAGS
227 #define CONFIG_BOOTFILE "fitImage"
228 #define CONFIG_BOOTARGS "console=ttymxc1,115200"
229 #define CONFIG_LOADADDR 0x70800000
230 #define CONFIG_BOOTCOMMAND "run mmc_mmc"
231 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
236 #define CONFIG_SPL_FRAMEWORK
237 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
238 #define CONFIG_SPL_BOARD_INIT
239 #define CONFIG_SPL_TEXT_BASE 0x70008000
240 #define CONFIG_SPL_PAD_TO 0x8000
241 #define CONFIG_SPL_STACK 0x70004000
243 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
244 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
245 #define CONFIG_SYS_NAND_OOBSIZE 64
246 #define CONFIG_SYS_NAND_PAGE_COUNT 64
247 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
248 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
253 #define CONFIG_PREBOOT "run try_bootscript"
254 #define CONFIG_HOSTNAME m53evk
256 #define CONFIG_EXTRA_ENV_SETTINGS \
257 "consdev=ttymxc1\0" \
258 "baudrate=115200\0" \
259 "bootscript=boot.scr\0" \
260 "bootdev=/dev/mmcblk0p1\0" \
261 "rootdev=/dev/mmcblk0p2\0" \
263 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \
264 "kernel_addr_r=0x72000000\0" \
266 "setenv bootargs ${bootargs} " \
267 "console=${consdev},${baudrate}\0" \
269 "setenv bootargs ${bootargs} " \
270 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
271 "${netmask}:${hostname}:${netdev}:off\0" \
273 "setenv bootargs ${bootargs} ${miscargs}\0" \
275 "if test \"x${mtdparts}\" == \"x\" ; then " \
276 "mtdparts default ; " \
279 "run adddfltmtd ; " \
280 "setenv bootargs ${bootargs} ${mtdparts}\0" \
281 "addargs=run addcons addmtd addmisc\0" \
284 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \
286 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \
287 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
289 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
290 "miscargs=nohlt panic=1\0" \
291 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \
293 "setenv bootargs ubi.mtd=5 " \
294 "root=ubi0:rootfs rootfstype=ubifs\0" \
296 "setenv bootargs root=/dev/nfs rw " \
297 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
299 "run mmcload mmcargs addargs ; " \
300 "bootm ${kernel_addr_r}\0" \
302 "run mmcload ubiargs addargs ; " \
303 "bootm ${kernel_addr_r}\0" \
305 "run mmcload nfsargs addip addargs ; " \
306 "bootm ${kernel_addr_r}\0" \
308 "run ubiload mmcargs addargs ; " \
309 "bootm ${kernel_addr_r}\0" \
311 "run ubiload ubiargs addargs ; " \
312 "bootm ${kernel_addr_r}\0" \
314 "run ubiload nfsargs addip addargs ; " \
315 "bootm ${kernel_addr_r}\0" \
317 "run netload mmcargs addargs ; " \
318 "bootm ${kernel_addr_r}\0" \
320 "run netload ubiargs addargs ; " \
321 "bootm ${kernel_addr_r}\0" \
323 "run netload nfsargs addip addargs ; " \
324 "bootm ${kernel_addr_r}\0" \
327 "if test -e mmc 0:1 ${bootscript} ; then " \
328 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
330 "echo Running bootscript... ; " \
331 "source ${kernel_addr_r} ; " \
335 #endif /* __M53EVK_CONFIG_H__ */