2 * DENX M53 configuration
3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __M53EVK_CONFIG_H__
9 #define __M53EVK_CONFIG_H__
12 #define CONFIG_MXC_GPIO
14 #include <asm/arch/imx-regs.h>
16 #define CONFIG_DISPLAY_CPUINFO
17 #define CONFIG_BOARD_EARLY_INIT_F
18 #define CONFIG_REVISION_TAG
19 #define CONFIG_SYS_NO_FLASH
24 #include <config_cmd_default.h>
25 #define CONFIG_DISPLAY_BOARDINFO
26 #define CONFIG_DOS_PARTITION
28 #define CONFIG_CMD_DATE
29 #define CONFIG_CMD_DHCP
30 #define CONFIG_CMD_EXT2
31 #define CONFIG_CMD_FAT
32 #define CONFIG_CMD_I2C
33 #define CONFIG_CMD_MII
34 #define CONFIG_CMD_MMC
35 #define CONFIG_CMD_NAND
36 #define CONFIG_CMD_NET
37 #define CONFIG_CMD_PING
38 #define CONFIG_CMD_SATA
39 #define CONFIG_CMD_USB
43 * Memory configurations
45 #define CONFIG_NR_DRAM_BANKS 2
46 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
47 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
48 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
49 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
50 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
51 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
52 #define CONFIG_SYS_MEMTEST_START 0x70000000
53 #define CONFIG_SYS_MEMTEST_END 0xaff00000
55 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
56 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
57 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
59 #define CONFIG_SYS_INIT_SP_OFFSET \
60 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
61 #define CONFIG_SYS_INIT_SP_ADDR \
62 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
64 #define CONFIG_SYS_TEXT_BASE 0x71000000
67 * U-Boot general configurations
69 #define CONFIG_SYS_LONGHELP
70 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
71 #define CONFIG_SYS_PBSIZE \
72 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
73 /* Print buffer size */
74 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
75 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
76 /* Boot argument buffer size */
77 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
78 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
79 #define CONFIG_CMDLINE_EDITING /* Command history etc */
80 #define CONFIG_SYS_HUSH_PARSER
85 #define CONFIG_MXC_UART
86 #define CONFIG_MXC_UART_BASE UART2_BASE
87 #define CONFIG_CONS_INDEX 1
88 #define CONFIG_BAUDRATE 115200
95 #define CONFIG_GENERIC_MMC
96 #define CONFIG_FSL_ESDHC
97 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
98 #define CONFIG_SYS_FSL_ESDHC_NUM 1
104 #define CONFIG_ENV_SIZE (16 * 1024)
105 #ifdef CONFIG_CMD_NAND
106 #define CONFIG_SYS_MAX_NAND_DEVICE 1
107 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
108 #define CONFIG_NAND_MXC
109 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
110 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
111 #define CONFIG_SYS_NAND_LARGEPAGE
112 #define CONFIG_MXC_NAND_HWECC
113 #define CONFIG_SYS_NAND_USE_FLASH_BBT
115 /* Environment is in NAND */
116 #define CONFIG_ENV_IS_IN_NAND
117 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
118 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
119 #define CONFIG_ENV_RANGE (512 * 1024)
120 #define CONFIG_ENV_OFFSET 0x100000
121 #define CONFIG_ENV_OFFSET_REDUND \
122 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
124 #define CONFIG_CMD_UBI
125 #define CONFIG_CMD_UBIFS
126 #define CONFIG_CMD_MTDPARTS
127 #define CONFIG_RBTREE
129 #define CONFIG_MTD_DEVICE
130 #define CONFIG_MTD_PARTITIONS
131 #define MTDIDS_DEFAULT "nand0=mxc-nand"
132 #define MTDPARTS_DEFAULT \
133 "mtdparts=mxc-nand:" \
134 "1m(bootloader)ro," \
135 "512k(environment)," \
136 "512k(redundant-environment)," \
142 #define CONFIG_ENV_IS_NOWHERE
146 * Ethernet on SOC (FEC)
148 #ifdef CONFIG_CMD_NET
149 #define CONFIG_FEC_MXC
150 #define IMX_FEC_BASE FEC_BASE_ADDR
151 #define CONFIG_FEC_MXC_PHYADDR 0x0
153 #define CONFIG_DISCOVER_PHY
154 #define CONFIG_FEC_XCV_TYPE RMII
155 #define CONFIG_PHYLIB
156 #define CONFIG_PHY_MICREL
162 #ifdef CONFIG_CMD_I2C
163 #define CONFIG_SYS_I2C
164 #define CONFIG_SYS_I2C_MXC
165 #define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
171 #ifdef CONFIG_CMD_DATE
172 #define CONFIG_RTC_M41T62
173 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
174 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
180 #ifdef CONFIG_CMD_USB
181 #define CONFIG_USB_EHCI
182 #define CONFIG_USB_EHCI_MX5
183 #define CONFIG_USB_STORAGE
184 #define CONFIG_USB_HOST_ETHER
185 #define CONFIG_USB_ETHER_ASIX
186 #define CONFIG_USB_ETHER_SMSC95XX
187 #define CONFIG_MXC_USB_PORT 1
188 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
189 #define CONFIG_MXC_USB_FLAGS 0
195 #ifdef CONFIG_CMD_SATA
196 #define CONFIG_DWC_AHSATA
197 #define CONFIG_SYS_SATA_MAX_DEVICE 1
198 #define CONFIG_DWC_AHSATA_PORT_ID 0
199 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
201 #define CONFIG_LIBATA
208 #define CONFIG_VIDEO_IPUV3
209 #define CONFIG_CFB_CONSOLE
210 #define CONFIG_VGA_AS_SINGLE_DEVICE
211 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
212 #define CONFIG_VIDEO_BMP_RLE8
213 #define CONFIG_SPLASH_SCREEN
214 #define CONFIG_BMP_16BPP
215 #define CONFIG_VIDEO_LOGO
216 #define CONFIG_IPUV3_CLK 200000000
222 #define CONFIG_CMDLINE_TAG
223 #define CONFIG_INITRD_TAG
224 #define CONFIG_REVISION_TAG
225 #define CONFIG_SETUP_MEMORY_TAGS
226 #define CONFIG_BOOTDELAY 3
227 #define CONFIG_BOOTFILE "m53evk/uImage"
228 #define CONFIG_BOOTARGS "console=ttymxc1,115200"
229 #define CONFIG_LOADADDR 0x70800000
230 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
231 #define CONFIG_OF_LIBFDT
237 #define CONFIG_SPL_FRAMEWORK
238 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
239 #define CONFIG_SPL_BOARD_INIT
240 #define CONFIG_SPL_TEXT_BASE 0x70008000
241 #define CONFIG_SPL_PAD_TO 0x8000
242 #define CONFIG_SPL_STACK 0x70004000
243 #define CONFIG_SPL_GPIO_SUPPORT
244 #define CONFIG_SPL_LIBCOMMON_SUPPORT
245 #define CONFIG_SPL_LIBGENERIC_SUPPORT
246 #define CONFIG_SPL_NAND_SUPPORT
247 #define CONFIG_SPL_SERIAL_SUPPORT
249 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
250 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
251 #define CONFIG_SYS_NAND_OOBSIZE 64
252 #define CONFIG_SYS_NAND_PAGE_COUNT 64
253 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
254 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
256 #endif /* __M53EVK_CONFIG_H__ */