2 * DENX M53 configuration
3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __M53EVK_CONFIG_H__
9 #define __M53EVK_CONFIG_H__
12 #define CONFIG_MXC_GPIO
14 #include <asm/arch/imx-regs.h>
16 #define CONFIG_DISPLAY_CPUINFO
17 #define CONFIG_BOARD_EARLY_INIT_F
18 #define CONFIG_REVISION_TAG
19 #define CONFIG_SYS_NO_FLASH
24 #include <config_cmd_default.h>
25 #define CONFIG_DISPLAY_BOARDINFO
26 #define CONFIG_DOS_PARTITION
28 #define CONFIG_CMD_DATE
29 #define CONFIG_CMD_DHCP
30 #define CONFIG_CMD_EXT2
31 #define CONFIG_CMD_FAT
32 #define CONFIG_CMD_I2C
33 #define CONFIG_CMD_MII
34 #define CONFIG_CMD_MMC
35 #define CONFIG_CMD_NAND
36 #define CONFIG_CMD_NET
37 #define CONFIG_CMD_PING
38 #define CONFIG_CMD_SATA
39 #define CONFIG_CMD_USB
42 #define CONFIG_REGEX /* Enable regular expression support */
45 * Memory configurations
47 #define CONFIG_NR_DRAM_BANKS 2
48 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
49 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
50 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
51 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
52 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
53 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
54 #define CONFIG_SYS_MEMTEST_START 0x70000000
55 #define CONFIG_SYS_MEMTEST_END 0x8ff00000
56 #define CONFIG_VERY_BIG_RAM
57 #define CONFIG_MAX_MEM_MAPPED PHYS_SDRAM_1_SIZE
59 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
60 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
61 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
63 #define CONFIG_SYS_INIT_SP_OFFSET \
64 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
65 #define CONFIG_SYS_INIT_SP_ADDR \
66 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
68 #define CONFIG_SYS_TEXT_BASE 0x71000000
71 * U-Boot general configurations
73 #define CONFIG_SYS_LONGHELP
74 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
75 #define CONFIG_SYS_PBSIZE \
76 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
77 /* Print buffer size */
78 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
79 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
80 /* Boot argument buffer size */
81 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
82 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
83 #define CONFIG_CMDLINE_EDITING /* Command history etc */
84 #define CONFIG_SYS_HUSH_PARSER
89 #define CONFIG_MXC_UART
90 #define CONFIG_MXC_UART_BASE UART2_BASE
91 #define CONFIG_CONS_INDEX 1
92 #define CONFIG_BAUDRATE 115200
99 #define CONFIG_GENERIC_MMC
100 #define CONFIG_FSL_ESDHC
101 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
102 #define CONFIG_SYS_FSL_ESDHC_NUM 1
108 #define CONFIG_ENV_SIZE (16 * 1024)
109 #ifdef CONFIG_CMD_NAND
110 #define CONFIG_SYS_MAX_NAND_DEVICE 1
111 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
112 #define CONFIG_NAND_MXC
113 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
114 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
115 #define CONFIG_SYS_NAND_LARGEPAGE
116 #define CONFIG_MXC_NAND_HWECC
117 #define CONFIG_SYS_NAND_USE_FLASH_BBT
119 /* Environment is in NAND */
120 #define CONFIG_ENV_IS_IN_NAND
121 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
122 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
123 #define CONFIG_ENV_RANGE (512 * 1024)
124 #define CONFIG_ENV_OFFSET 0x100000
125 #define CONFIG_ENV_OFFSET_REDUND \
126 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
128 #define CONFIG_CMD_UBI
129 #define CONFIG_CMD_UBIFS
130 #define CONFIG_CMD_MTDPARTS
131 #define CONFIG_RBTREE
133 #define CONFIG_MTD_DEVICE
134 #define CONFIG_MTD_PARTITIONS
135 #define MTDIDS_DEFAULT "nand0=mxc_nand"
136 #define MTDPARTS_DEFAULT \
137 "mtdparts=mxc_nand:" \
138 "1m(bootloader)ro," \
139 "512k(environment)," \
140 "512k(redundant-environment)," \
146 #define CONFIG_ENV_IS_NOWHERE
150 * Ethernet on SOC (FEC)
152 #ifdef CONFIG_CMD_NET
153 #define CONFIG_FEC_MXC
154 #define IMX_FEC_BASE FEC_BASE_ADDR
155 #define CONFIG_FEC_MXC_PHYADDR 0x0
157 #define CONFIG_DISCOVER_PHY
158 #define CONFIG_FEC_XCV_TYPE RMII
159 #define CONFIG_PHYLIB
160 #define CONFIG_PHY_MICREL
166 #ifdef CONFIG_CMD_I2C
167 #define CONFIG_SYS_I2C
168 #define CONFIG_SYS_I2C_MXC
169 #define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
175 #ifdef CONFIG_CMD_DATE
176 #define CONFIG_RTC_M41T62
177 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
178 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
184 #ifdef CONFIG_CMD_USB
185 #define CONFIG_USB_EHCI
186 #define CONFIG_USB_EHCI_MX5
187 #define CONFIG_USB_STORAGE
188 #define CONFIG_USB_HOST_ETHER
189 #define CONFIG_USB_ETHER_ASIX
190 #define CONFIG_USB_ETHER_SMSC95XX
191 #define CONFIG_MXC_USB_PORT 1
192 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
193 #define CONFIG_MXC_USB_FLAGS 0
199 #ifdef CONFIG_CMD_SATA
200 #define CONFIG_DWC_AHSATA
201 #define CONFIG_SYS_SATA_MAX_DEVICE 1
202 #define CONFIG_DWC_AHSATA_PORT_ID 0
203 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
205 #define CONFIG_LIBATA
212 #define CONFIG_VIDEO_IPUV3
213 #define CONFIG_CFB_CONSOLE
214 #define CONFIG_VGA_AS_SINGLE_DEVICE
215 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
216 #define CONFIG_VIDEO_BMP_RLE8
217 #define CONFIG_SPLASH_SCREEN
218 #define CONFIG_BMP_16BPP
219 #define CONFIG_VIDEO_LOGO
220 #define CONFIG_IPUV3_CLK 200000000
226 #define CONFIG_CMDLINE_TAG
227 #define CONFIG_INITRD_TAG
228 #define CONFIG_REVISION_TAG
229 #define CONFIG_SETUP_MEMORY_TAGS
230 #define CONFIG_BOOTDELAY 3
231 #define CONFIG_BOOTFILE "m53evk/uImage"
232 #define CONFIG_BOOTARGS "console=ttymxc1,115200"
233 #define CONFIG_LOADADDR 0x70800000
234 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
235 #define CONFIG_OF_LIBFDT
241 #define CONFIG_SPL_FRAMEWORK
242 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
243 #define CONFIG_SPL_BOARD_INIT
244 #define CONFIG_SPL_TEXT_BASE 0x70008000
245 #define CONFIG_SPL_PAD_TO 0x8000
246 #define CONFIG_SPL_STACK 0x70004000
247 #define CONFIG_SPL_GPIO_SUPPORT
248 #define CONFIG_SPL_LIBCOMMON_SUPPORT
249 #define CONFIG_SPL_LIBGENERIC_SUPPORT
250 #define CONFIG_SPL_NAND_SUPPORT
251 #define CONFIG_SPL_SERIAL_SUPPORT
253 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
254 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
255 #define CONFIG_SYS_NAND_OOBSIZE 64
256 #define CONFIG_SYS_NAND_PAGE_COUNT 64
257 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
258 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
260 #endif /* __M53EVK_CONFIG_H__ */