2 * Based on Modifications by Alan Lu / Artila and
3 * Rick Bronson <rick@efn.org>
5 * Configuration settings for the Artila M-501 starter kit,
6 * with V02 processor card.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 /* ARM asynchronous clock */
31 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
32 #define AT91C_MAIN_CLOCK 179712000
33 /* Perip clock (AT91C_MASTER_CLOCK / 3) */
34 #define AT91C_MASTER_CLOCK 59904000
35 #define AT91_SLOW_CLOCK 32768 /* slow clock */
37 #define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */
38 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
39 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
40 #define CONFIG_SETUP_MEMORY_TAGS 1
41 #define CONFIG_INITRD_TAG 1
43 #undef CONFIG_AUTOBOOT_PROMPT
44 #define CONFIG_MENUPROMPT "."
47 * Size of malloc() pool
49 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
50 #define CFG_GBL_DATA_SIZE 128 /* Bytes reserved for initial data */
52 #define CONFIG_BAUDRATE 115200
54 /* Hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */
55 #define CFG_AT91C_BRGR_DIVISOR 33
60 #define CFG_FLASH_CFI 1
61 #define CFG_FLASH_CFI_DRIVER 1
62 #define CFG_ENV_SECT_SIZE 0x20000
63 #define CFG_FLASH_USE_BUFFER_WRITE
64 #define CFG_FLASH_PROTECTION /*for Intel P30 Flash*/
65 #define CONFIG_HARD_I2C
66 #define CFG_I2C_SPEED 100
67 #define CFG_I2C_SLAVE 0
68 #define CFG_CONSOLE_INFO_QUIET
69 #undef CFG_ENV_IS_IN_EEPROM
70 #define CFG_I2C_EEPROM_ADDR 0x50
71 #define CFG_I2C_EEPROM_ADDR_LEN 1
72 #define CFG_EEPROM_AT24C16
73 #define CFG_I2C_RTC_ADDR 0x32
74 #undef CONFIG_RTC_DS1338
75 #define CONFIG_RTC_RS5C372A
78 #define CONFIG_CMC_PU2
80 /* define one of these to choose the DBGU, USART0 or USART1 as console */
85 #undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
86 #undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
88 #define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200 " \
89 "initrd=0x20800000,8192000 ramdisk_size=15360 " \
90 "root=/dev/ram0 rw mtdparts=phys_mapped_flash:" \
91 "128k(loader)ro,128k(reserved)ro,1408k(linux)" \
92 "ro,2560k(ramdisk)ro,-(userdisk)"
93 #define CONFIG_BOOTCOMMAND "bootm 10040000 101a0000"
94 #define CONFIG_BOOTDELAY 1
95 #define CONFIG_BAUDRATE 115200
96 #define CONFIG_IPADDR 192.168.1.100
97 #define CONFIG_SERVERIP 192.168.1.1
98 #define CONFIG_GATEWAYIP 192.168.1.254
99 #define CONFIG_NETMASK 255.255.255.0
100 #define CONFIG_BOOTFILE uImage
101 #define CONFIG_ETHADDR 00:13:48:aa:bb:cc
102 #define CONFIG_ENV_OVERWRITE 1
103 #define BOARD_LATE_INIT
105 #define CONFIG_EXTRA_ENV_SETTINGS \
108 #define CFG_CMD_JFFS2
109 #undef CONFIG_CMD_EEPROM
110 #define CONFIG_CMD_NET
111 #define CONFIG_CMD_RUN
112 #define CONFIG_CMD_DHCP
113 #define CONFIG_CMD_MEMORY
114 #define CONFIG_CMD_PING
115 #define CONFIG_CMD_SDRAM
116 #define CONFIG_CMD_DIAG
117 #define CONFIG_CMD_I2C
118 #define CONFIG_CMD_DATE
119 #define CONFIG_CMD_POST
120 #define CONFIG_CMD_MISC
121 #define CONFIG_CMD_LOADS
122 #define CONFIG_CMD_IMI
123 #define CONFIG_CMD_NFS
124 #define CONFIG_CMD_FLASH
125 #define CONFIG_CMD_ENV
127 #define CFG_HUSH_PARSER
128 #define CONFIG_AUTO_COMPLETE
129 #define CFG_PROMPT_HUSH_PS2 ">>"
131 #define CFG_MAX_NAND_DEVICE 0 /* Max number of NAND devices */
132 #define SECTORSIZE 512
134 #define ADDR_COLUMN 1
136 #define ADDR_COLUMN_PAGE 3
138 #define CONFIG_NR_DRAM_BANKS 1
139 #define PHYS_SDRAM 0x20000000
140 #define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */
142 #define CFG_MEMTEST_START 0x21000000 /* PHYS_SDRAM */
143 /* CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144 */
144 #define CFG_MEMTEST_END 0x00100000
146 #define CONFIG_DRIVER_ETHER
147 #define CONFIG_NET_RETRY_COUNT 20
148 #define CONFIG_AT91C_USE_RMII
150 #define PHYS_FLASH_1 0x10000000
151 #define PHYS_FLASH_SIZE 0x800000 /* 8 megs main flash */
152 #define CFG_FLASH_BASE PHYS_FLASH_1
153 #define CFG_MAX_FLASH_BANKS 1
154 #define CFG_MAX_FLASH_SECT 256
155 #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
156 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
158 #ifdef CFG_ENV_IS_IN_DATAFLASH
159 #define CFG_ENV_OFFSET 0x20000
160 #define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
161 #define CFG_ENV_SIZE 0x2000
163 #define CFG_ENV_IS_IN_FLASH
164 #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x00020000)
165 #define CFG_ENV_SIZE 2048
168 #ifdef CFG_ENV_IS_IN_EEPROM
169 #define CFG_ENV_OFFSET 1024
170 #define CFG_ENV_SIZE 1024
173 #define CFG_LOAD_ADDR 0x21000000 /* default load address */
175 /* use for protect flash sectors */
176 #define CFG_BOOT_SIZE 0x6000 /* 24 KBytes */
177 #define CFG_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
178 #define CFG_U_BOOT_SIZE 0x10000 /* 64 KBytes */
180 #define CFG_BAUDRATE_TABLE { 115200 , 19200, 38400, 57600, 9600 }
182 #define CFG_PROMPT "U-Boot> " /* Monitor Command Prompt */
183 #define CFG_CBSIZE 512 /* Console I/O Buffer Size */
184 #define CFG_MAXARGS 16 /* max number of command args */
185 /* Print Buffer Size */
186 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
189 #define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2
191 #define CONFIG_STACKSIZE (32*1024) /* regular stack */
193 #ifdef CONFIG_USE_IRQ
194 #error CONFIG_USE_IRQ not supported