2 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
3 * on behalf of DENX Software Engineering GmbH
5 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __CONFIGS_M28EVK_H__
8 #define __CONFIGS_M28EVK_H__
10 /* System configurations */
11 #define CONFIG_MX28 /* i.MX28 SoC */
12 #define MACH_TYPE_M28EVK 3613
13 #define CONFIG_MACH_TYPE MACH_TYPE_M28EVK
16 #define CONFIG_SYS_NO_FLASH
17 #include <config_cmd_default.h>
18 #define CONFIG_DISPLAY_CPUINFO
19 #define CONFIG_DOS_PARTITION
21 #define CONFIG_CMD_CACHE
22 #define CONFIG_CMD_DATE
23 #define CONFIG_CMD_DHCP
24 #define CONFIG_CMD_EEPROM
25 #define CONFIG_CMD_EXT2
26 #define CONFIG_CMD_FAT
27 #define CONFIG_CMD_GPIO
28 #define CONFIG_CMD_GREPENV
29 #define CONFIG_CMD_I2C
30 #define CONFIG_CMD_MII
31 #define CONFIG_CMD_MMC
32 #define CONFIG_CMD_NAND
33 #define CONFIG_CMD_NAND_TRIMFFS
34 #define CONFIG_CMD_NET
35 #define CONFIG_CMD_NFS
36 #define CONFIG_CMD_PING
37 #define CONFIG_CMD_SETEXPR
39 #define CONFIG_CMD_SPI
40 #define CONFIG_CMD_USB
43 #define CONFIG_REGEX /* Enable regular expression support */
45 /* Memory configuration */
46 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
47 #define PHYS_SDRAM_1 0x40000000 /* Base address */
48 #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */
49 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
52 #define CONFIG_ENV_SIZE (16 * 1024)
53 #define CONFIG_ENV_IS_IN_NAND
55 /* Environment is in NAND */
56 #if defined(CONFIG_CMD_NAND) && defined(CONFIG_ENV_IS_IN_NAND)
57 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
58 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
59 #define CONFIG_ENV_RANGE (512 * 1024)
60 #define CONFIG_ENV_OFFSET 0x300000
61 #define CONFIG_ENV_OFFSET_REDUND \
62 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
64 #define CONFIG_CMD_UBI
65 #define CONFIG_CMD_UBIFS
66 #define CONFIG_CMD_MTDPARTS
69 #define CONFIG_MTD_DEVICE
70 #define CONFIG_MTD_PARTITIONS
71 #define MTDIDS_DEFAULT "nand0=gpmi-nand"
72 #define MTDPARTS_DEFAULT \
73 "mtdparts=gpmi-nand:" \
75 "512k(environment)," \
76 "512k(redundant-environment)," \
82 #define CONFIG_ENV_IS_NOWHERE
85 /* FEC Ethernet on SoC */
87 #define CONFIG_FEC_MXC
91 #ifdef CONFIG_CMD_EEPROM
92 #define CONFIG_SYS_I2C_MULTI_EEPROMS
93 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
97 #ifdef CONFIG_CMD_DATE
98 /* Use the internal RTC in the MXS chip */
99 #define CONFIG_RTC_INTERNAL
100 #ifdef CONFIG_RTC_INTERNAL
101 #define CONFIG_RTC_MXS
103 #define CONFIG_RTC_M41T62
104 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
105 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
110 #ifdef CONFIG_CMD_USB
111 #define CONFIG_EHCI_MXS_PORT0
112 #define CONFIG_EHCI_MXS_PORT1
113 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
114 #define CONFIG_USB_STORAGE
118 #ifdef CONFIG_CMD_SPI
119 #define CONFIG_DEFAULT_SPI_BUS 2
120 #define CONFIG_DEFAULT_SPI_CS 0
121 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
125 #define CONFIG_SPI_FLASH
126 #define CONFIG_SPI_FLASH_STMICRO
127 #define CONFIG_SF_DEFAULT_BUS 2
128 #define CONFIG_SF_DEFAULT_CS 0
129 #define CONFIG_SF_DEFAULT_SPEED 40000000
130 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
132 #define CONFIG_ENV_SPI_BUS 2
133 #define CONFIG_ENV_SPI_CS 0
134 #define CONFIG_ENV_SPI_MAX_HZ 40000000
135 #define CONFIG_ENV_SPI_MODE SPI_MODE_0
142 #define CONFIG_VIDEO_LOGO
143 #define CONFIG_SPLASH_SCREEN
144 #define CONFIG_CMD_BMP
145 #define CONFIG_BMP_16BPP
146 #define CONFIG_VIDEO_BMP_RLE8
147 #define CONFIG_VIDEO_BMP_GZIP
148 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10)
152 #define CONFIG_BOOTDELAY 3
153 #define CONFIG_BOOTFILE "uImage"
154 #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 "
155 #define CONFIG_BOOTCOMMAND "run bootcmd_net"
156 #define CONFIG_LOADADDR 0x42000000
157 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
159 /* Extra Environment */
160 #define CONFIG_EXTRA_ENV_SETTINGS \
161 "update_nand_full_filename=u-boot.nand\0" \
162 "update_nand_firmware_filename=u-boot.sb\0" \
163 "update_sd_firmware_filename=u-boot.sd\0" \
164 "update_nand_firmware_maxsz=0x100000\0" \
165 "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \
166 "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \
167 "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \
170 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
171 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
172 "update_nand_full=" /* Update FCB, DBBT and FW */ \
173 "if tftp ${update_nand_full_filename} ; then " \
174 "run update_nand_get_fcb_size ; " \
175 "nand scrub -y 0x0 ${filesize} ; " \
176 "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \
177 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
178 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
179 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
181 "update_nand_firmware=" /* Update only firmware */ \
182 "if tftp ${update_nand_firmware_filename} ; then " \
183 "run update_nand_get_fcb_size ; " \
184 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
185 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
186 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
187 "nand erase ${fcb_sz} ${fw_sz} ; " \
188 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \
189 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \
191 "update_sd_firmware=" /* Update the SD firmware partition */ \
192 "if mmc rescan ; then " \
193 "if tftp ${update_sd_firmware_filename} ; then " \
194 "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \
195 "setexpr fw_sz ${fw_sz} + 1 ; " \
196 "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
200 /* The rest of the configuration is shared */
201 #include <configs/mxs.h>
203 #endif /* __CONFIGS_M28EVK_H__ */