2 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
3 * on behalf of DENX Software Engineering GmbH
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 #ifndef __M28EVK_CONFIG_H__
21 #define __M28EVK_CONFIG_H__
26 #define CONFIG_MX28 /* i.MX28 SoC */
27 #define CONFIG_MXS_GPIO /* GPIO control */
28 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
31 * Define M28EVK machine type by hand until it lands in mach-types
33 #define MACH_TYPE_M28EVK 3613
35 #define CONFIG_MACH_TYPE MACH_TYPE_M28EVK
37 #include <asm/arch/regs-base.h>
39 #define CONFIG_SYS_NO_FLASH
40 #define CONFIG_BOARD_EARLY_INIT_F
41 #define CONFIG_ARCH_MISC_INIT
47 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
48 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
49 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
50 #define CONFIG_SPL_LIBCOMMON_SUPPORT
51 #define CONFIG_SPL_LIBGENERIC_SUPPORT
52 #define CONFIG_SPL_GPIO_SUPPORT
57 #include <config_cmd_default.h>
58 #define CONFIG_DISPLAY_CPUINFO
59 #define CONFIG_DOS_PARTITION
61 #define CONFIG_CMD_CACHE
62 #define CONFIG_CMD_DATE
63 #define CONFIG_CMD_DHCP
64 #define CONFIG_CMD_EEPROM
65 #define CONFIG_CMD_EXT2
66 #define CONFIG_CMD_FAT
67 #define CONFIG_CMD_GPIO
68 #define CONFIG_CMD_I2C
69 #define CONFIG_CMD_MII
70 #define CONFIG_CMD_MMC
71 #define CONFIG_CMD_NAND
72 #define CONFIG_CMD_NET
73 #define CONFIG_CMD_NFS
74 #define CONFIG_CMD_PING
75 #define CONFIG_CMD_SETEXPR
77 #define CONFIG_CMD_SPI
78 #define CONFIG_CMD_USB
81 * Memory configurations
83 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
84 #define PHYS_SDRAM_1 0x40000000 /* Base address */
85 #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */
86 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
87 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
88 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
89 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
90 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
91 /* Point initial SP in SRAM so SPL can use it too. */
93 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
94 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
96 #define CONFIG_SYS_INIT_SP_OFFSET \
97 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
98 #define CONFIG_SYS_INIT_SP_ADDR \
99 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
101 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
102 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
103 * binary. In case there was more of this mess, 0x100 bytes are skipped.
105 #define CONFIG_SYS_TEXT_BASE 0x40000100
108 * U-Boot general configurations
110 #define CONFIG_SYS_LONGHELP
111 #define CONFIG_SYS_PROMPT "=> "
112 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
113 #define CONFIG_SYS_PBSIZE \
114 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
115 /* Print buffer size */
116 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
117 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
118 /* Boot argument buffer size */
119 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
120 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
121 #define CONFIG_CMDLINE_EDITING /* Command history etc */
122 #define CONFIG_SYS_HUSH_PARSER
127 #define CONFIG_PL011_SERIAL
128 #define CONFIG_PL011_CLOCK 24000000
129 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
130 #define CONFIG_CONS_INDEX 0
131 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
136 #ifdef CONFIG_CMD_MMC
138 #define CONFIG_BOUNCE_BUFFER
139 #define CONFIG_GENERIC_MMC
140 #define CONFIG_MXS_MMC
146 #define CONFIG_APBH_DMA
151 #define CONFIG_ENV_SIZE (16 * 1024)
152 #ifdef CONFIG_CMD_NAND
153 #define CONFIG_NAND_MXS
154 #define CONFIG_SYS_MAX_NAND_DEVICE 1
155 #define CONFIG_SYS_NAND_BASE 0x60000000
156 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
158 /* Environment is in NAND */
159 #define CONFIG_ENV_IS_IN_NAND
160 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
161 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
162 #define CONFIG_ENV_RANGE (512 * 1024)
163 #define CONFIG_ENV_OFFSET 0x300000
164 #define CONFIG_ENV_OFFSET_REDUND \
165 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
167 #define CONFIG_CMD_UBI
168 #define CONFIG_CMD_UBIFS
169 #define CONFIG_CMD_MTDPARTS
170 #define CONFIG_RBTREE
172 #define CONFIG_MTD_DEVICE
173 #define CONFIG_MTD_PARTITIONS
174 #define MTDIDS_DEFAULT "nand0=gpmi-nand"
175 #define MTDPARTS_DEFAULT \
176 "mtdparts=gpmi-nand:" \
177 "3m(bootloader)ro," \
178 "512k(environment)," \
179 "512k(redundant-environment)," \
185 #define CONFIG_ENV_IS_NOWHERE
189 * Ethernet on SOC (FEC)
191 #ifdef CONFIG_CMD_NET
192 #define CONFIG_ETHPRIME "FEC0"
193 #define CONFIG_FEC_MXC
195 #define CONFIG_FEC_XCV_TYPE RMII
201 #ifdef CONFIG_CMD_I2C
202 #define CONFIG_I2C_MXS
203 #define CONFIG_HARD_I2C
204 #define CONFIG_SYS_I2C_SPEED 400000
210 #ifdef CONFIG_CMD_EEPROM
211 #define CONFIG_SYS_I2C_MULTI_EEPROMS
212 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
218 #ifdef CONFIG_CMD_DATE
219 /* Use the internal RTC in the MXS chip */
220 #define CONFIG_RTC_INTERNAL
221 #ifdef CONFIG_RTC_INTERNAL
222 #define CONFIG_RTC_MXS
224 #define CONFIG_RTC_M41T62
225 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
226 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
233 #ifdef CONFIG_CMD_USB
234 #define CONFIG_USB_EHCI
235 #define CONFIG_USB_EHCI_MXS
236 #define CONFIG_EHCI_MXS_PORT0
237 #define CONFIG_EHCI_MXS_PORT1
238 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
239 #define CONFIG_EHCI_IS_TDI
240 #define CONFIG_USB_STORAGE
246 #ifdef CONFIG_CMD_SPI
247 #define CONFIG_HARD_SPI
248 #define CONFIG_MXS_SPI
249 #define CONFIG_SPI_HALF_DUPLEX
250 #define CONFIG_DEFAULT_SPI_BUS 2
251 #define CONFIG_DEFAULT_SPI_CS 0
252 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
256 #define CONFIG_SPI_FLASH
257 #define CONFIG_SPI_FLASH_STMICRO
258 #define CONFIG_SF_DEFAULT_BUS 2
259 #define CONFIG_SF_DEFAULT_CS 0
260 #define CONFIG_SF_DEFAULT_SPEED 40000000
261 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
263 #define CONFIG_ENV_SPI_BUS 2
264 #define CONFIG_ENV_SPI_CS 0
265 #define CONFIG_ENV_SPI_MAX_HZ 40000000
266 #define CONFIG_ENV_SPI_MODE SPI_MODE_0
273 #define CONFIG_CMDLINE_TAG
274 #define CONFIG_SETUP_MEMORY_TAGS
275 #define CONFIG_BOOTDELAY 3
276 #define CONFIG_BOOTFILE "uImage"
277 #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 "
278 #define CONFIG_BOOTCOMMAND "run bootcmd_net"
279 #define CONFIG_LOADADDR 0x42000000
280 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
281 #define CONFIG_OF_LIBFDT
286 #define CONFIG_EXTRA_ENV_SETTINGS \
287 "update_nand_full_filename=u-boot.nand\0" \
288 "update_nand_firmware_filename=u-boot.sb\0" \
289 "update_sd_firmware_filename=u-boot.sd\0" \
290 "update_nand_firmware_maxsz=0x100000\0" \
291 "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \
292 "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \
293 "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \
296 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
297 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
298 "update_nand_full=" /* Update FCB, DBBT and FW */ \
299 "if tftp ${update_nand_full_filename} ; then " \
300 "run update_nand_get_fcb_size ; " \
301 "nand scrub -y 0x0 ${filesize} ; " \
302 "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \
303 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
304 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
305 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
307 "update_nand_firmware=" /* Update only firmware */ \
308 "if tftp ${update_nand_firmware_filename} ; then " \
309 "run update_nand_get_fcb_size ; " \
310 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
311 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
312 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
313 "nand erase ${fcb_sz} ${fw_sz} ; " \
314 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \
315 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \
317 "update_sd_firmware=" /* Update the SD firmware partition */ \
318 "if mmc rescan ; then " \
319 "if tftp ${update_sd_firmware_filename} ; then " \
320 "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \
321 "setexpr fw_sz ${fw_sz} + 1 ; " \
322 "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
326 #endif /* __M28EVK_CONFIG_H__ */