2 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
3 * on behalf of DENX Software Engineering GmbH
5 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __CONFIGS_M28EVK_H__
8 #define __CONFIGS_M28EVK_H__
11 /* System configurations */
12 #define CONFIG_MX28 /* i.MX28 SoC */
13 #define MACH_TYPE_M28EVK 3613
14 #define CONFIG_MACH_TYPE MACH_TYPE_M28EVK
17 #define CONFIG_SYS_NO_FLASH
18 #include <config_cmd_default.h>
19 #define CONFIG_DISPLAY_CPUINFO
20 #define CONFIG_DOS_PARTITION
22 #define CONFIG_CMD_CACHE
23 #define CONFIG_CMD_DATE
24 #define CONFIG_CMD_DHCP
25 #define CONFIG_CMD_EEPROM
26 #define CONFIG_CMD_EXT2
27 #define CONFIG_CMD_FAT
28 #define CONFIG_CMD_GPIO
29 #define CONFIG_CMD_GREPENV
30 #define CONFIG_CMD_I2C
31 #define CONFIG_CMD_MII
32 #define CONFIG_CMD_MMC
33 #define CONFIG_CMD_NAND
34 #define CONFIG_CMD_NAND_TRIMFFS
35 #define CONFIG_CMD_NET
36 #define CONFIG_CMD_NFS
37 #define CONFIG_CMD_PING
38 #define CONFIG_CMD_SETEXPR
40 #define CONFIG_CMD_SPI
41 #define CONFIG_CMD_USB
44 #define CONFIG_REGEX /* Enable regular expression support */
46 /* Memory configuration */
47 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
48 #define PHYS_SDRAM_1 0x40000000 /* Base address */
49 #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */
50 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
53 #define CONFIG_ENV_SIZE (16 * 1024)
54 #define CONFIG_ENV_IS_IN_NAND
56 /* Environment is in NAND */
57 #if defined(CONFIG_CMD_NAND) && defined(CONFIG_ENV_IS_IN_NAND)
58 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
59 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
60 #define CONFIG_ENV_RANGE (512 * 1024)
61 #define CONFIG_ENV_OFFSET 0x300000
62 #define CONFIG_ENV_OFFSET_REDUND \
63 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
65 #define CONFIG_CMD_UBI
66 #define CONFIG_CMD_UBIFS
67 #define CONFIG_CMD_MTDPARTS
70 #define CONFIG_MTD_DEVICE
71 #define CONFIG_MTD_PARTITIONS
72 #define MTDIDS_DEFAULT "nand0=gpmi-nand"
73 #define MTDPARTS_DEFAULT \
74 "mtdparts=gpmi-nand:" \
76 "512k(environment)," \
77 "512k(redundant-environment)," \
83 #define CONFIG_ENV_IS_NOWHERE
86 /* FEC Ethernet on SoC */
88 #define CONFIG_FEC_MXC
92 #ifdef CONFIG_CMD_EEPROM
93 #define CONFIG_SYS_I2C_MULTI_EEPROMS
94 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
98 #ifdef CONFIG_CMD_DATE
99 /* Use the internal RTC in the MXS chip */
100 #define CONFIG_RTC_INTERNAL
101 #ifdef CONFIG_RTC_INTERNAL
102 #define CONFIG_RTC_MXS
104 #define CONFIG_RTC_M41T62
105 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
106 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
111 #ifdef CONFIG_CMD_USB
112 #define CONFIG_EHCI_MXS_PORT0
113 #define CONFIG_EHCI_MXS_PORT1
114 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
115 #define CONFIG_USB_STORAGE
119 #ifdef CONFIG_CMD_SPI
120 #define CONFIG_DEFAULT_SPI_BUS 2
121 #define CONFIG_DEFAULT_SPI_CS 0
122 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
126 #define CONFIG_SPI_FLASH
127 #define CONFIG_SPI_FLASH_STMICRO
128 #define CONFIG_SF_DEFAULT_BUS 2
129 #define CONFIG_SF_DEFAULT_CS 0
130 #define CONFIG_SF_DEFAULT_SPEED 40000000
131 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
133 #define CONFIG_ENV_SPI_BUS 2
134 #define CONFIG_ENV_SPI_CS 0
135 #define CONFIG_ENV_SPI_MAX_HZ 40000000
136 #define CONFIG_ENV_SPI_MODE SPI_MODE_0
143 #define CONFIG_VIDEO_LOGO
144 #define CONFIG_SPLASH_SCREEN
145 #define CONFIG_CMD_BMP
146 #define CONFIG_BMP_16BPP
147 #define CONFIG_VIDEO_BMP_RLE8
148 #define CONFIG_VIDEO_BMP_GZIP
149 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10)
153 #define CONFIG_BOOTDELAY 3
154 #define CONFIG_BOOTFILE "uImage"
155 #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 "
156 #define CONFIG_BOOTCOMMAND "run bootcmd_net"
157 #define CONFIG_LOADADDR 0x42000000
158 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
160 /* Extra Environment */
161 #define CONFIG_EXTRA_ENV_SETTINGS \
162 "update_nand_full_filename=u-boot.nand\0" \
163 "update_nand_firmware_filename=u-boot.sb\0" \
164 "update_sd_firmware_filename=u-boot.sd\0" \
165 "update_nand_firmware_maxsz=0x100000\0" \
166 "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \
167 "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \
168 "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \
171 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
172 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
173 "update_nand_full=" /* Update FCB, DBBT and FW */ \
174 "if tftp ${update_nand_full_filename} ; then " \
175 "run update_nand_get_fcb_size ; " \
176 "nand scrub -y 0x0 ${filesize} ; " \
177 "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \
178 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
179 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
180 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
182 "update_nand_firmware=" /* Update only firmware */ \
183 "if tftp ${update_nand_firmware_filename} ; then " \
184 "run update_nand_get_fcb_size ; " \
185 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
186 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
187 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
188 "nand erase ${fcb_sz} ${fw_sz} ; " \
189 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \
190 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \
192 "update_sd_firmware=" /* Update the SD firmware partition */ \
193 "if mmc rescan ; then " \
194 "if tftp ${update_sd_firmware_filename} ; then " \
195 "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \
196 "setexpr fw_sz ${fw_sz} + 1 ; " \
197 "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
201 /* The rest of the configuration is shared */
202 #include <configs/mxs.h>
204 #endif /* __CONFIGS_M28EVK_H__ */