include/configs/lx2160a_common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2018-2021 NXP
   4  */
   5
   6 #ifndef __LX2_COMMON_H
   7 #define __LX2_COMMON_H
   8
   9 #include <asm/arch/stream_id_lsch3.h>
  10 #include <asm/arch/config.h>
  11 #include <asm/arch/soc.h>
  12
  13 #define CONFIG_FSL_MEMAC
  14
  15 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
  16 #define CONFIG_SYS_FLASH_BASE           0x20000000
  17
  18 /* DDR */
  19 #define CONFIG_SYS_FSL_DDR_INTLV_256B   /* force 256 byte interleaving */
  20 #define CONFIG_VERY_BIG_RAM
  21 #define CONFIG_SYS_DDR_SDRAM_BASE               0x80000000UL
  22 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
  23 #define CONFIG_SYS_DDR_BLOCK2_BASE              0x2080000000ULL
  24 #define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS       2
  25 #define CONFIG_SYS_SDRAM_SIZE                   0x200000000UL
  26 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  27 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
  28 #define SPD_EEPROM_ADDRESS1             0x51
  29 #define SPD_EEPROM_ADDRESS2             0x52
  30 #define SPD_EEPROM_ADDRESS3             0x53
  31 #define SPD_EEPROM_ADDRESS4             0x54
  32 #define SPD_EEPROM_ADDRESS5             0x55
  33 #define SPD_EEPROM_ADDRESS6             0x56
  34 #define SPD_EEPROM_ADDRESS              SPD_EEPROM_ADDRESS1
  35 #define CONFIG_SYS_SPD_BUS_NUM          0       /* SPD on I2C bus 0 */
  36 #define CONFIG_DIMM_SLOTS_PER_CTLR      2
  37 #define CONFIG_SYS_MONITOR_LEN          (936 * 1024)
  38
  39 /* Miscellaneous configurable options */
  40
  41 /* SMP Definitinos  */
  42 #define CPU_RELEASE_ADDR                secondary_boot_addr
  43
  44 /* Generic Timer Definitions */
  45 /*
  46  * This is not an accurate number. It is used in start.S. The frequency
  47  * will be udpated later when get_bus_freq(0) is available.
  48  */
  49
  50 #define COUNTER_FREQUENCY               25000000        /* 25MHz */
  51
  52 /* Serial Port */
  53 #define CONFIG_PL011_CLOCK              (get_bus_freq(0) / 4)
  54 #define CONFIG_SYS_SERIAL0              0x21c0000
  55 #define CONFIG_SYS_SERIAL1              0x21d0000
  56 #define CONFIG_SYS_SERIAL2              0x21e0000
  57 #define CONFIG_SYS_SERIAL3              0x21f0000
  58 /*below might needs to be removed*/
  59 #define CONFIG_PL01x_PORTS              {(void *)CONFIG_SYS_SERIAL0, \
  60                                         (void *)CONFIG_SYS_SERIAL1, \
  61                                         (void *)CONFIG_SYS_SERIAL2, \
  62                                         (void *)CONFIG_SYS_SERIAL3 }
  63
  64 /* MC firmware */
  65 #define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH         0x20000
  66 #define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET        0x00F00000
  67 #define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH         0x20000
  68 #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET        0x00F20000
  69 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS        5000
  70
  71 /* Define phy_reset function to boot the MC based on mcinitcmd.
  72  * This happens late enough to properly fixup u-boot env MAC addresses.
  73  */
  74 #define CONFIG_RESET_PHY_R
  75
  76 /*
  77  * Carve out a DDR region which will not be used by u-boot/Linux
  78  *
  79  * It will be used by MC and Debug Server. The MC region must be
  80  * 512MB aligned, so the min size to hide is 512MB.
  81  */
  82 #ifdef CONFIG_FSL_MC_ENET
  83 #define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE    (256UL * 1024 * 1024)
  84 #endif
  85
  86 /* I2C bus multiplexer */
  87 #define I2C_MUX_PCA_ADDR_PRI            0x77 /* Primary Mux*/
  88 #define I2C_MUX_CH_DEFAULT              0x8
  89
  90 /* RTC */
  91 #define RTC
  92 #define CONFIG_SYS_I2C_RTC_ADDR         0x51  /* Channel 3*/
  93
  94 /* EEPROM */
  95 #define CONFIG_SYS_I2C_EEPROM_NXID
  96 #define CONFIG_SYS_EEPROM_BUS_NUM               0
  97
  98 /* Qixis */
  99 #define CONFIG_FSL_QIXIS
 100 #define CONFIG_QIXIS_I2C_ACCESS
 101 #define CONFIG_SYS_I2C_FPGA_ADDR                0x66
 102
 103 /* PCI */
 104 #ifdef CONFIG_PCI
 105 #define CONFIG_PCI_SCAN_SHOW
 106 #endif
 107
 108 /* SATA */
 109
 110 #ifdef CONFIG_SCSI
 111 #define CONFIG_SYS_SATA1                AHCI_BASE_ADDR1
 112 #define CONFIG_SYS_SATA2                AHCI_BASE_ADDR2
 113 #endif
 114
 115 /* USB */
 116 #ifdef CONFIG_USB_HOST
 117 #ifndef CONFIG_TARGET_LX2162AQDS
 118 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 119 #endif
 120 #endif
 121
 122 #define COUNTER_FREQUENCY_REAL          (get_board_sys_clk() / 4)
 123
 124 #define CONFIG_HWCONFIG
 125 #define HWCONFIG_BUFFER_SIZE            128
 126
 127 /* Monitor Command Prompt */
 128 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 129 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 130                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 131 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE /* Boot args buffer */
 132 #define CONFIG_SYS_MAXARGS              64      /* max command args */
 133
 134 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 135
 136 /* Initial environment variables */
 137 #define XSPI_MC_INIT_CMD                                \
 138         "sf probe 0:0 && "                              \
 139         "sf read 0x80640000 0x640000 0x80000 && "       \
 140         "sf read $fdt_addr_r 0xf00000 0x100000 && "     \
 141         "env exists secureboot && "                     \
 142         "esbc_validate 0x80640000 && "                  \
 143         "esbc_validate 0x80680000; "                    \
 144         "sf read 0x80a00000 0xa00000 0x300000 && "      \
 145         "sf read 0x80e00000 0xe00000 0x100000; "        \
 146         "fsl_mc start mc 0x80a00000 0x80e00000\0"
 147
 148 #define SD_MC_INIT_CMD                          \
 149         "mmc read 0x80a00000 0x5000 0x1200;"    \
 150         "mmc read 0x80e00000 0x7000 0x800;"     \
 151         "mmc read $fdt_addr_r 0x7800 0x800;"    \
 152         "env exists secureboot && "             \
 153         "mmc read 0x80640000 0x3200 0x20 && "   \
 154         "mmc read 0x80680000 0x3400 0x20 && "   \
 155         "esbc_validate 0x80640000 && "          \
 156         "esbc_validate 0x80680000 ;"            \
 157         "fsl_mc start mc 0x80a00000 0x80e00000\0"
 158
 159 #define SD2_MC_INIT_CMD                         \
 160         "mmc dev 1; mmc read 0x80a00000 0x5000 0x1200;" \
 161         "mmc read 0x80e00000 0x7000 0x800;"     \
 162         "mmc read $fdt_addr_r 0x7800 0x800;"    \
 163         "env exists secureboot && "             \
 164         "mmc read 0x80640000 0x3200 0x20 && "   \
 165         "mmc read 0x80680000 0x3400 0x20 && "   \
 166         "esbc_validate 0x80640000 && "          \
 167         "esbc_validate 0x80680000 ;"            \
 168         "fsl_mc start mc 0x80a00000 0x80e00000\0"
 169
 170 #define EXTRA_ENV_SETTINGS                      \
 171         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
 172         "ramdisk_addr=0x800000\0"               \
 173         "ramdisk_size=0x2000000\0"              \
 174         "fdt_high=0xa0000000\0"                 \
 175         "initrd_high=0xffffffffffffffff\0"      \
 176         "fdt_addr=0x64f00000\0"                 \
 177         "kernel_start=0x1000000\0"              \
 178         "kernelheader_start=0x600000\0"         \
 179         "scriptaddr=0x80000000\0"               \
 180         "scripthdraddr=0x80080000\0"            \
 181         "fdtheader_addr_r=0x80100000\0"         \
 182         "kernelheader_addr_r=0x80200000\0"      \
 183         "kernel_addr_r=0x81000000\0"            \
 184         "kernelheader_size=0x40000\0"           \
 185         "fdt_addr_r=0x90000000\0"               \
 186         "load_addr=0xa0000000\0"                \
 187         "kernel_size=0x2800000\0"               \
 188         "kernel_addr_sd=0x8000\0"               \
 189         "kernelhdr_addr_sd=0x3000\0"            \
 190         "kernel_size_sd=0x14000\0"              \
 191         "kernelhdr_size_sd=0x20\0"              \
 192         "console=ttyAMA0,38400n8\0"             \
 193         BOOTENV                                 \
 194         "mcmemsize=0x70000000\0"                \
 195         XSPI_MC_INIT_CMD                                \
 196         "scan_dev_for_boot_part="               \
 197                 "part list ${devtype} ${devnum} devplist; "     \
 198                 "env exists devplist || setenv devplist 1; "    \
 199                 "for distro_bootpart in ${devplist}; do "       \
 200                         "if fstype ${devtype} "                 \
 201                                 "${devnum}:${distro_bootpart} " \
 202                                 "bootfstype; then "             \
 203                                 "run scan_dev_for_boot; "       \
 204                         "fi; "                                  \
 205                 "done\0"                                        \
 206         "boot_a_script="                                        \
 207                 "load ${devtype} ${devnum}:${distro_bootpart} " \
 208                         "${scriptaddr} ${prefix}${script}; "    \
 209                 "env exists secureboot && load ${devtype} "     \
 210                         "${devnum}:${distro_bootpart} "         \
 211                         "${scripthdraddr} ${prefix}${boot_script_hdr} " \
 212                         "&& esbc_validate ${scripthdraddr};"    \
 213                 "source ${scriptaddr}\0"
 214
 215 #define XSPI_NOR_BOOTCOMMAND                                            \
 216                         "sf probe 0:0; "                                \
 217                         "sf read 0x806c0000 0x6c0000 0x40000; "         \
 218                         "env exists mcinitcmd && env exists secureboot" \
 219                         " && esbc_validate 0x806c0000; "                \
 220                         "sf read 0x80d00000 0xd00000 0x100000; "        \
 221                         "env exists mcinitcmd && "                      \
 222                         "fsl_mc lazyapply dpl 0x80d00000; "             \
 223                         "run distro_bootcmd;run xspi_bootcmd; "         \
 224                         "env exists secureboot && esbc_halt;"
 225
 226 #define SD_BOOTCOMMAND                                          \
 227                 "env exists mcinitcmd && mmcinfo; "             \
 228                 "mmc read 0x80d00000 0x6800 0x800; "            \
 229                 "env exists mcinitcmd && env exists secureboot "        \
 230                 " && mmc read 0x806C0000 0x3600 0x20 "          \
 231                 "&& esbc_validate 0x806C0000;env exists mcinitcmd "     \
 232                 "&& fsl_mc lazyapply dpl 0x80d00000;"           \
 233                 "run distro_bootcmd;run sd_bootcmd;"            \
 234                 "env exists secureboot && esbc_halt;"
 235
 236 #define SD2_BOOTCOMMAND                                         \
 237                 "mmc dev 1; env exists mcinitcmd && mmcinfo; "  \
 238                 "mmc read 0x80d00000 0x6800 0x800; "            \
 239                 "env exists mcinitcmd && env exists secureboot "        \
 240                 " && mmc read 0x806C0000 0x3600 0x20 "          \
 241                 "&& esbc_validate 0x806C0000;env exists mcinitcmd "     \
 242                 "&& fsl_mc lazyapply dpl 0x80d00000;"           \
 243                 "run distro_bootcmd;run sd2_bootcmd;"           \
 244                 "env exists secureboot && esbc_halt;"
 245
 246 #define BOOT_TARGET_DEVICES(func) \
 247         func(USB, usb, 0) \
 248         func(MMC, mmc, 0) \
 249         func(MMC, mmc, 1) \
 250         func(SCSI, scsi, 0) \
 251         func(DHCP, dhcp, na)
 252 #include <config_distro_bootcmd.h>
 253
 254 #endif /* __LX2_COMMON_H */