include/configs/lx2160a_common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2018-2021 NXP
   4  */
   5
   6 #ifndef __LX2_COMMON_H
   7 #define __LX2_COMMON_H
   8
   9 #include <asm/arch/stream_id_lsch3.h>
  10 #include <asm/arch/config.h>
  11 #include <asm/arch/soc.h>
  12
  13 #define CONFIG_REMAKE_ELF
  14 #define CONFIG_FSL_LAYERSCAPE
  15 #define CONFIG_FSL_TZPC_BP147
  16 #define CONFIG_FSL_MEMAC
  17
  18 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
  19 #define CONFIG_SYS_FLASH_BASE           0x20000000
  20
  21 /* DDR */
  22 #define CONFIG_FSL_DDR_INTERACTIVE      /* Interactive debugging */
  23 #define CONFIG_SYS_FSL_DDR_INTLV_256B   /* force 256 byte interleaving */
  24 #define CONFIG_VERY_BIG_RAM
  25 #define CONFIG_SYS_DDR_SDRAM_BASE               0x80000000UL
  26 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
  27 #define CONFIG_SYS_DDR_BLOCK2_BASE              0x2080000000ULL
  28 #define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS       2
  29 #define CONFIG_SYS_SDRAM_SIZE                   0x200000000UL
  30 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  31 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
  32 #define SPD_EEPROM_ADDRESS1             0x51
  33 #define SPD_EEPROM_ADDRESS2             0x52
  34 #define SPD_EEPROM_ADDRESS3             0x53
  35 #define SPD_EEPROM_ADDRESS4             0x54
  36 #define SPD_EEPROM_ADDRESS5             0x55
  37 #define SPD_EEPROM_ADDRESS6             0x56
  38 #define SPD_EEPROM_ADDRESS              SPD_EEPROM_ADDRESS1
  39 #define CONFIG_SYS_SPD_BUS_NUM          0       /* SPD on I2C bus 0 */
  40 #define CONFIG_DIMM_SLOTS_PER_CTLR      2
  41 #define CONFIG_CHIP_SELECTS_PER_CTRL    4
  42 #define CONFIG_FSL_DDR_BIST     /* enable built-in memory test */
  43 #define CONFIG_SYS_MONITOR_LEN          (936 * 1024)
  44
  45 /* Miscellaneous configurable options */
  46
  47 /* SMP Definitinos  */
  48 #define CPU_RELEASE_ADDR                secondary_boot_addr
  49
  50 /* Generic Timer Definitions */
  51 /*
  52  * This is not an accurate number. It is used in start.S. The frequency
  53  * will be udpated later when get_bus_freq(0) is available.
  54  */
  55
  56 #define COUNTER_FREQUENCY               25000000        /* 25MHz */
  57
  58 /* Serial Port */
  59 #define CONFIG_PL01X_SERIAL
  60 #define CONFIG_PL011_CLOCK              (get_bus_freq(0) / 4)
  61 #define CONFIG_SYS_SERIAL0              0x21c0000
  62 #define CONFIG_SYS_SERIAL1              0x21d0000
  63 #define CONFIG_SYS_SERIAL2              0x21e0000
  64 #define CONFIG_SYS_SERIAL3              0x21f0000
  65 /*below might needs to be removed*/
  66 #define CONFIG_PL01x_PORTS              {(void *)CONFIG_SYS_SERIAL0, \
  67                                         (void *)CONFIG_SYS_SERIAL1, \
  68                                         (void *)CONFIG_SYS_SERIAL2, \
  69                                         (void *)CONFIG_SYS_SERIAL3 }
  70 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
  71
  72 /* MC firmware */
  73 #define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH         0x20000
  74 #define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET        0x00F00000
  75 #define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH         0x20000
  76 #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET        0x00F20000
  77 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS        5000
  78
  79 /* Define phy_reset function to boot the MC based on mcinitcmd.
  80  * This happens late enough to properly fixup u-boot env MAC addresses.
  81  */
  82 #define CONFIG_RESET_PHY_R
  83
  84 /*
  85  * Carve out a DDR region which will not be used by u-boot/Linux
  86  *
  87  * It will be used by MC and Debug Server. The MC region must be
  88  * 512MB aligned, so the min size to hide is 512MB.
  89  */
  90 #ifdef CONFIG_FSL_MC_ENET
  91 #define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE    (256UL * 1024 * 1024)
  92 #endif
  93
  94 /* I2C bus multiplexer */
  95 #define I2C_MUX_PCA_ADDR_PRI            0x77 /* Primary Mux*/
  96 #define I2C_MUX_CH_DEFAULT              0x8
  97
  98 /* RTC */
  99 #define RTC
 100 #define CONFIG_SYS_I2C_RTC_ADDR         0x51  /* Channel 3*/
 101
 102 /* EEPROM */
 103 #define CONFIG_SYS_I2C_EEPROM_NXID
 104 #define CONFIG_SYS_EEPROM_BUS_NUM               0
 105
 106 /* Qixis */
 107 #define CONFIG_FSL_QIXIS
 108 #define CONFIG_QIXIS_I2C_ACCESS
 109 #define CONFIG_SYS_I2C_FPGA_ADDR                0x66
 110
 111 /* PCI */
 112 #ifdef CONFIG_PCI
 113 #define CONFIG_SYS_PCI_64BIT
 114 #define CONFIG_PCI_SCAN_SHOW
 115 #endif
 116
 117 /* SATA */
 118
 119 #ifdef CONFIG_SCSI
 120 #define CONFIG_SCSI_AHCI_PLAT
 121 #define CONFIG_SYS_SATA1                AHCI_BASE_ADDR1
 122 #define CONFIG_SYS_SATA2                AHCI_BASE_ADDR2
 123 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     1
 124 #define CONFIG_SYS_SCSI_MAX_LUN         1
 125 #define CONFIG_SYS_SCSI_MAX_DEVICE      (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
 126                                         CONFIG_SYS_SCSI_MAX_LUN)
 127 #endif
 128
 129 /* USB */
 130 #ifdef CONFIG_USB_HOST
 131 #ifndef CONFIG_TARGET_LX2162AQDS
 132 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 133 #endif
 134 #endif
 135
 136 /* GPIO */
 137 #ifdef CONFIG_DM_GPIO
 138 #ifndef CONFIG_MPC8XXX_GPIO
 139 #define CONFIG_MPC8XXX_GPIO
 140 #endif
 141 #endif
 142
 143 #ifndef __ASSEMBLY__
 144 unsigned long get_board_sys_clk(void);
 145 #endif
 146
 147 #define CONFIG_SYS_CLK_FREQ             get_board_sys_clk()
 148 #define COUNTER_FREQUENCY_REAL          (CONFIG_SYS_CLK_FREQ / 4)
 149
 150 #define CONFIG_HWCONFIG
 151 #define HWCONFIG_BUFFER_SIZE            128
 152
 153 /* Monitor Command Prompt */
 154 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 155 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 156                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 157 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE /* Boot args buffer */
 158 #define CONFIG_SYS_MAXARGS              64      /* max command args */
 159
 160 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 161
 162 /* Initial environment variables */
 163 #define XSPI_MC_INIT_CMD                                \
 164         "sf probe 0:0 && "                              \
 165         "sf read 0x80640000 0x640000 0x80000 && "       \
 166         "sf read $fdt_addr_r 0xf00000 0x100000 && "     \
 167         "env exists secureboot && "                     \
 168         "esbc_validate 0x80640000 && "                  \
 169         "esbc_validate 0x80680000; "                    \
 170         "sf read 0x80a00000 0xa00000 0x300000 && "      \
 171         "sf read 0x80e00000 0xe00000 0x100000; "        \
 172         "fsl_mc start mc 0x80a00000 0x80e00000\0"
 173
 174 #define SD_MC_INIT_CMD                          \
 175         "mmc read 0x80a00000 0x5000 0x1200;"    \
 176         "mmc read 0x80e00000 0x7000 0x800;"     \
 177         "mmc read $fdt_addr_r 0x7800 0x800;"    \
 178         "env exists secureboot && "             \
 179         "mmc read 0x80640000 0x3200 0x20 && "   \
 180         "mmc read 0x80680000 0x3400 0x20 && "   \
 181         "esbc_validate 0x80640000 && "          \
 182         "esbc_validate 0x80680000 ;"            \
 183         "fsl_mc start mc 0x80a00000 0x80e00000\0"
 184
 185 #define SD2_MC_INIT_CMD                         \
 186         "mmc dev 1; mmc read 0x80a00000 0x5000 0x1200;" \
 187         "mmc read 0x80e00000 0x7000 0x800;"     \
 188         "mmc read $fdt_addr_r 0x7800 0x800;"    \
 189         "env exists secureboot && "             \
 190         "mmc read 0x80640000 0x3200 0x20 && "   \
 191         "mmc read 0x80680000 0x3400 0x20 && "   \
 192         "esbc_validate 0x80640000 && "          \
 193         "esbc_validate 0x80680000 ;"            \
 194         "fsl_mc start mc 0x80a00000 0x80e00000\0"
 195
 196 #define EXTRA_ENV_SETTINGS                      \
 197         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
 198         "ramdisk_addr=0x800000\0"               \
 199         "ramdisk_size=0x2000000\0"              \
 200         "fdt_high=0xa0000000\0"                 \
 201         "initrd_high=0xffffffffffffffff\0"      \
 202         "fdt_addr=0x64f00000\0"                 \
 203         "kernel_start=0x1000000\0"              \
 204         "kernelheader_start=0x600000\0"         \
 205         "scriptaddr=0x80000000\0"               \
 206         "scripthdraddr=0x80080000\0"            \
 207         "fdtheader_addr_r=0x80100000\0"         \
 208         "kernelheader_addr_r=0x80200000\0"      \
 209         "kernel_addr_r=0x81000000\0"            \
 210         "kernelheader_size=0x40000\0"           \
 211         "fdt_addr_r=0x90000000\0"               \
 212         "load_addr=0xa0000000\0"                \
 213         "kernel_size=0x2800000\0"               \
 214         "kernel_addr_sd=0x8000\0"               \
 215         "kernelhdr_addr_sd=0x3000\0"            \
 216         "kernel_size_sd=0x14000\0"              \
 217         "kernelhdr_size_sd=0x20\0"              \
 218         "console=ttyAMA0,38400n8\0"             \
 219         BOOTENV                                 \
 220         "mcmemsize=0x70000000\0"                \
 221         XSPI_MC_INIT_CMD                                \
 222         "scan_dev_for_boot_part="               \
 223                 "part list ${devtype} ${devnum} devplist; "     \
 224                 "env exists devplist || setenv devplist 1; "    \
 225                 "for distro_bootpart in ${devplist}; do "       \
 226                         "if fstype ${devtype} "                 \
 227                                 "${devnum}:${distro_bootpart} " \
 228                                 "bootfstype; then "             \
 229                                 "run scan_dev_for_boot; "       \
 230                         "fi; "                                  \
 231                 "done\0"                                        \
 232         "boot_a_script="                                        \
 233                 "load ${devtype} ${devnum}:${distro_bootpart} " \
 234                         "${scriptaddr} ${prefix}${script}; "    \
 235                 "env exists secureboot && load ${devtype} "     \
 236                         "${devnum}:${distro_bootpart} "         \
 237                         "${scripthdraddr} ${prefix}${boot_script_hdr} " \
 238                         "&& esbc_validate ${scripthdraddr};"    \
 239                 "source ${scriptaddr}\0"
 240
 241 #define XSPI_NOR_BOOTCOMMAND                                            \
 242                         "sf probe 0:0; "                                \
 243                         "sf read 0x806c0000 0x6c0000 0x40000; "         \
 244                         "env exists mcinitcmd && env exists secureboot" \
 245                         " && esbc_validate 0x806c0000; "                \
 246                         "sf read 0x80d00000 0xd00000 0x100000; "        \
 247                         "env exists mcinitcmd && "                      \
 248                         "fsl_mc lazyapply dpl 0x80d00000; "             \
 249                         "run distro_bootcmd;run xspi_bootcmd; "         \
 250                         "env exists secureboot && esbc_halt;"
 251
 252 #define SD_BOOTCOMMAND                                          \
 253                 "env exists mcinitcmd && mmcinfo; "             \
 254                 "mmc read 0x80d00000 0x6800 0x800; "            \
 255                 "env exists mcinitcmd && env exists secureboot "        \
 256                 " && mmc read 0x806C0000 0x3600 0x20 "          \
 257                 "&& esbc_validate 0x806C0000;env exists mcinitcmd "     \
 258                 "&& fsl_mc lazyapply dpl 0x80d00000;"           \
 259                 "run distro_bootcmd;run sd_bootcmd;"            \
 260                 "env exists secureboot && esbc_halt;"
 261
 262 #define SD2_BOOTCOMMAND                                         \
 263                 "mmc dev 1; env exists mcinitcmd && mmcinfo; "  \
 264                 "mmc read 0x80d00000 0x6800 0x800; "            \
 265                 "env exists mcinitcmd && env exists secureboot "        \
 266                 " && mmc read 0x806C0000 0x3600 0x20 "          \
 267                 "&& esbc_validate 0x806C0000;env exists mcinitcmd "     \
 268                 "&& fsl_mc lazyapply dpl 0x80d00000;"           \
 269                 "run distro_bootcmd;run sd2_bootcmd;"           \
 270                 "env exists secureboot && esbc_halt;"
 271
 272 #define BOOT_TARGET_DEVICES(func) \
 273         func(USB, usb, 0) \
 274         func(MMC, mmc, 0) \
 275         func(MMC, mmc, 1) \
 276         func(SCSI, scsi, 0) \
 277         func(DHCP, dhcp, na)
 278 #include <config_distro_bootcmd.h>
 279
 280 #endif /* __LX2_COMMON_H */