Merge tag 'xilinx-for-v2022.01-rc3' of https://source.denx.de/u-boot/custodians/u...
[platform/kernel/u-boot.git] / include / configs / lx2160a_common.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2018-2021 NXP
4  */
5
6 #ifndef __LX2_COMMON_H
7 #define __LX2_COMMON_H
8
9 #include <asm/arch/stream_id_lsch3.h>
10 #include <asm/arch/config.h>
11 #include <asm/arch/soc.h>
12
13 #define CONFIG_REMAKE_ELF
14 #define CONFIG_FSL_TZPC_BP147
15 #define CONFIG_FSL_MEMAC
16
17 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
18 #define CONFIG_SYS_FLASH_BASE           0x20000000
19
20 /* DDR */
21 #define CONFIG_FSL_DDR_INTERACTIVE      /* Interactive debugging */
22 #define CONFIG_SYS_FSL_DDR_INTLV_256B   /* force 256 byte interleaving */
23 #define CONFIG_VERY_BIG_RAM
24 #define CONFIG_SYS_DDR_SDRAM_BASE               0x80000000UL
25 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
26 #define CONFIG_SYS_DDR_BLOCK2_BASE              0x2080000000ULL
27 #define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS       2
28 #define CONFIG_SYS_SDRAM_SIZE                   0x200000000UL
29 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
30 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
31 #define SPD_EEPROM_ADDRESS1             0x51
32 #define SPD_EEPROM_ADDRESS2             0x52
33 #define SPD_EEPROM_ADDRESS3             0x53
34 #define SPD_EEPROM_ADDRESS4             0x54
35 #define SPD_EEPROM_ADDRESS5             0x55
36 #define SPD_EEPROM_ADDRESS6             0x56
37 #define SPD_EEPROM_ADDRESS              SPD_EEPROM_ADDRESS1
38 #define CONFIG_SYS_SPD_BUS_NUM          0       /* SPD on I2C bus 0 */
39 #define CONFIG_DIMM_SLOTS_PER_CTLR      2
40 #define CONFIG_CHIP_SELECTS_PER_CTRL    4
41 #define CONFIG_FSL_DDR_BIST     /* enable built-in memory test */
42 #define CONFIG_SYS_MONITOR_LEN          (936 * 1024)
43
44 /* Miscellaneous configurable options */
45
46 /* SMP Definitinos  */
47 #define CPU_RELEASE_ADDR                secondary_boot_addr
48
49 /* Generic Timer Definitions */
50 /*
51  * This is not an accurate number. It is used in start.S. The frequency
52  * will be udpated later when get_bus_freq(0) is available.
53  */
54
55 #define COUNTER_FREQUENCY               25000000        /* 25MHz */
56
57 /* Serial Port */
58 #define CONFIG_PL011_CLOCK              (get_bus_freq(0) / 4)
59 #define CONFIG_SYS_SERIAL0              0x21c0000
60 #define CONFIG_SYS_SERIAL1              0x21d0000
61 #define CONFIG_SYS_SERIAL2              0x21e0000
62 #define CONFIG_SYS_SERIAL3              0x21f0000
63 /*below might needs to be removed*/
64 #define CONFIG_PL01x_PORTS              {(void *)CONFIG_SYS_SERIAL0, \
65                                         (void *)CONFIG_SYS_SERIAL1, \
66                                         (void *)CONFIG_SYS_SERIAL2, \
67                                         (void *)CONFIG_SYS_SERIAL3 }
68
69 /* MC firmware */
70 #define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH         0x20000
71 #define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET        0x00F00000
72 #define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH         0x20000
73 #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET        0x00F20000
74 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS        5000
75
76 /* Define phy_reset function to boot the MC based on mcinitcmd.
77  * This happens late enough to properly fixup u-boot env MAC addresses.
78  */
79 #define CONFIG_RESET_PHY_R
80
81 /*
82  * Carve out a DDR region which will not be used by u-boot/Linux
83  *
84  * It will be used by MC and Debug Server. The MC region must be
85  * 512MB aligned, so the min size to hide is 512MB.
86  */
87 #ifdef CONFIG_FSL_MC_ENET
88 #define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE    (256UL * 1024 * 1024)
89 #endif
90
91 /* I2C bus multiplexer */
92 #define I2C_MUX_PCA_ADDR_PRI            0x77 /* Primary Mux*/
93 #define I2C_MUX_CH_DEFAULT              0x8
94
95 /* RTC */
96 #define RTC
97 #define CONFIG_SYS_I2C_RTC_ADDR         0x51  /* Channel 3*/
98
99 /* EEPROM */
100 #define CONFIG_SYS_I2C_EEPROM_NXID
101 #define CONFIG_SYS_EEPROM_BUS_NUM               0
102
103 /* Qixis */
104 #define CONFIG_FSL_QIXIS
105 #define CONFIG_QIXIS_I2C_ACCESS
106 #define CONFIG_SYS_I2C_FPGA_ADDR                0x66
107
108 /* PCI */
109 #ifdef CONFIG_PCI
110 #define CONFIG_SYS_PCI_64BIT
111 #define CONFIG_PCI_SCAN_SHOW
112 #endif
113
114 /* SATA */
115
116 #ifdef CONFIG_SCSI
117 #define CONFIG_SCSI_AHCI_PLAT
118 #define CONFIG_SYS_SATA1                AHCI_BASE_ADDR1
119 #define CONFIG_SYS_SATA2                AHCI_BASE_ADDR2
120 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     1
121 #define CONFIG_SYS_SCSI_MAX_LUN         1
122 #define CONFIG_SYS_SCSI_MAX_DEVICE      (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
123                                         CONFIG_SYS_SCSI_MAX_LUN)
124 #endif
125
126 /* USB */
127 #ifdef CONFIG_USB_HOST
128 #ifndef CONFIG_TARGET_LX2162AQDS
129 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
130 #endif
131 #endif
132
133 /* GPIO */
134 #ifdef CONFIG_DM_GPIO
135 #ifndef CONFIG_MPC8XXX_GPIO
136 #define CONFIG_MPC8XXX_GPIO
137 #endif
138 #endif
139
140 #ifndef __ASSEMBLY__
141 unsigned long get_board_sys_clk(void);
142 #endif
143
144 #define CONFIG_SYS_CLK_FREQ             get_board_sys_clk()
145 #define COUNTER_FREQUENCY_REAL          (CONFIG_SYS_CLK_FREQ / 4)
146
147 #define CONFIG_HWCONFIG
148 #define HWCONFIG_BUFFER_SIZE            128
149
150 /* Monitor Command Prompt */
151 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
152 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
153                                         sizeof(CONFIG_SYS_PROMPT) + 16)
154 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE /* Boot args buffer */
155 #define CONFIG_SYS_MAXARGS              64      /* max command args */
156
157 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
158
159 /* Initial environment variables */
160 #define XSPI_MC_INIT_CMD                                \
161         "sf probe 0:0 && "                              \
162         "sf read 0x80640000 0x640000 0x80000 && "       \
163         "sf read $fdt_addr_r 0xf00000 0x100000 && "     \
164         "env exists secureboot && "                     \
165         "esbc_validate 0x80640000 && "                  \
166         "esbc_validate 0x80680000; "                    \
167         "sf read 0x80a00000 0xa00000 0x300000 && "      \
168         "sf read 0x80e00000 0xe00000 0x100000; "        \
169         "fsl_mc start mc 0x80a00000 0x80e00000\0"
170
171 #define SD_MC_INIT_CMD                          \
172         "mmc read 0x80a00000 0x5000 0x1200;"    \
173         "mmc read 0x80e00000 0x7000 0x800;"     \
174         "mmc read $fdt_addr_r 0x7800 0x800;"    \
175         "env exists secureboot && "             \
176         "mmc read 0x80640000 0x3200 0x20 && "   \
177         "mmc read 0x80680000 0x3400 0x20 && "   \
178         "esbc_validate 0x80640000 && "          \
179         "esbc_validate 0x80680000 ;"            \
180         "fsl_mc start mc 0x80a00000 0x80e00000\0"
181
182 #define SD2_MC_INIT_CMD                         \
183         "mmc dev 1; mmc read 0x80a00000 0x5000 0x1200;" \
184         "mmc read 0x80e00000 0x7000 0x800;"     \
185         "mmc read $fdt_addr_r 0x7800 0x800;"    \
186         "env exists secureboot && "             \
187         "mmc read 0x80640000 0x3200 0x20 && "   \
188         "mmc read 0x80680000 0x3400 0x20 && "   \
189         "esbc_validate 0x80640000 && "          \
190         "esbc_validate 0x80680000 ;"            \
191         "fsl_mc start mc 0x80a00000 0x80e00000\0"
192
193 #define EXTRA_ENV_SETTINGS                      \
194         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
195         "ramdisk_addr=0x800000\0"               \
196         "ramdisk_size=0x2000000\0"              \
197         "fdt_high=0xa0000000\0"                 \
198         "initrd_high=0xffffffffffffffff\0"      \
199         "fdt_addr=0x64f00000\0"                 \
200         "kernel_start=0x1000000\0"              \
201         "kernelheader_start=0x600000\0"         \
202         "scriptaddr=0x80000000\0"               \
203         "scripthdraddr=0x80080000\0"            \
204         "fdtheader_addr_r=0x80100000\0"         \
205         "kernelheader_addr_r=0x80200000\0"      \
206         "kernel_addr_r=0x81000000\0"            \
207         "kernelheader_size=0x40000\0"           \
208         "fdt_addr_r=0x90000000\0"               \
209         "load_addr=0xa0000000\0"                \
210         "kernel_size=0x2800000\0"               \
211         "kernel_addr_sd=0x8000\0"               \
212         "kernelhdr_addr_sd=0x3000\0"            \
213         "kernel_size_sd=0x14000\0"              \
214         "kernelhdr_size_sd=0x20\0"              \
215         "console=ttyAMA0,38400n8\0"             \
216         BOOTENV                                 \
217         "mcmemsize=0x70000000\0"                \
218         XSPI_MC_INIT_CMD                                \
219         "scan_dev_for_boot_part="               \
220                 "part list ${devtype} ${devnum} devplist; "     \
221                 "env exists devplist || setenv devplist 1; "    \
222                 "for distro_bootpart in ${devplist}; do "       \
223                         "if fstype ${devtype} "                 \
224                                 "${devnum}:${distro_bootpart} " \
225                                 "bootfstype; then "             \
226                                 "run scan_dev_for_boot; "       \
227                         "fi; "                                  \
228                 "done\0"                                        \
229         "boot_a_script="                                        \
230                 "load ${devtype} ${devnum}:${distro_bootpart} " \
231                         "${scriptaddr} ${prefix}${script}; "    \
232                 "env exists secureboot && load ${devtype} "     \
233                         "${devnum}:${distro_bootpart} "         \
234                         "${scripthdraddr} ${prefix}${boot_script_hdr} " \
235                         "&& esbc_validate ${scripthdraddr};"    \
236                 "source ${scriptaddr}\0"
237
238 #define XSPI_NOR_BOOTCOMMAND                                            \
239                         "sf probe 0:0; "                                \
240                         "sf read 0x806c0000 0x6c0000 0x40000; "         \
241                         "env exists mcinitcmd && env exists secureboot" \
242                         " && esbc_validate 0x806c0000; "                \
243                         "sf read 0x80d00000 0xd00000 0x100000; "        \
244                         "env exists mcinitcmd && "                      \
245                         "fsl_mc lazyapply dpl 0x80d00000; "             \
246                         "run distro_bootcmd;run xspi_bootcmd; "         \
247                         "env exists secureboot && esbc_halt;"
248
249 #define SD_BOOTCOMMAND                                          \
250                 "env exists mcinitcmd && mmcinfo; "             \
251                 "mmc read 0x80d00000 0x6800 0x800; "            \
252                 "env exists mcinitcmd && env exists secureboot "        \
253                 " && mmc read 0x806C0000 0x3600 0x20 "          \
254                 "&& esbc_validate 0x806C0000;env exists mcinitcmd "     \
255                 "&& fsl_mc lazyapply dpl 0x80d00000;"           \
256                 "run distro_bootcmd;run sd_bootcmd;"            \
257                 "env exists secureboot && esbc_halt;"
258
259 #define SD2_BOOTCOMMAND                                         \
260                 "mmc dev 1; env exists mcinitcmd && mmcinfo; "  \
261                 "mmc read 0x80d00000 0x6800 0x800; "            \
262                 "env exists mcinitcmd && env exists secureboot "        \
263                 " && mmc read 0x806C0000 0x3600 0x20 "          \
264                 "&& esbc_validate 0x806C0000;env exists mcinitcmd "     \
265                 "&& fsl_mc lazyapply dpl 0x80d00000;"           \
266                 "run distro_bootcmd;run sd2_bootcmd;"           \
267                 "env exists secureboot && esbc_halt;"
268
269 #define BOOT_TARGET_DEVICES(func) \
270         func(USB, usb, 0) \
271         func(MMC, mmc, 0) \
272         func(MMC, mmc, 1) \
273         func(SCSI, scsi, 0) \
274         func(DHCP, dhcp, na)
275 #include <config_distro_bootcmd.h>
276
277 #endif /* __LX2_COMMON_H */