Merge branch '2021-12-27-CONFIG-migrations' into next
[platform/kernel/u-boot.git] / include / configs / lx2160a_common.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2018-2021 NXP
4  */
5
6 #ifndef __LX2_COMMON_H
7 #define __LX2_COMMON_H
8
9 #include <asm/arch/stream_id_lsch3.h>
10 #include <asm/arch/config.h>
11 #include <asm/arch/soc.h>
12
13 #define CONFIG_REMAKE_ELF
14 #define CONFIG_FSL_MEMAC
15
16 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
17 #define CONFIG_SYS_FLASH_BASE           0x20000000
18
19 /* DDR */
20 #define CONFIG_SYS_FSL_DDR_INTLV_256B   /* force 256 byte interleaving */
21 #define CONFIG_VERY_BIG_RAM
22 #define CONFIG_SYS_DDR_SDRAM_BASE               0x80000000UL
23 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
24 #define CONFIG_SYS_DDR_BLOCK2_BASE              0x2080000000ULL
25 #define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS       2
26 #define CONFIG_SYS_SDRAM_SIZE                   0x200000000UL
27 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
28 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
29 #define SPD_EEPROM_ADDRESS1             0x51
30 #define SPD_EEPROM_ADDRESS2             0x52
31 #define SPD_EEPROM_ADDRESS3             0x53
32 #define SPD_EEPROM_ADDRESS4             0x54
33 #define SPD_EEPROM_ADDRESS5             0x55
34 #define SPD_EEPROM_ADDRESS6             0x56
35 #define SPD_EEPROM_ADDRESS              SPD_EEPROM_ADDRESS1
36 #define CONFIG_SYS_SPD_BUS_NUM          0       /* SPD on I2C bus 0 */
37 #define CONFIG_DIMM_SLOTS_PER_CTLR      2
38 #define CONFIG_CHIP_SELECTS_PER_CTRL    4
39 #define CONFIG_SYS_MONITOR_LEN          (936 * 1024)
40
41 /* Miscellaneous configurable options */
42
43 /* SMP Definitinos  */
44 #define CPU_RELEASE_ADDR                secondary_boot_addr
45
46 /* Generic Timer Definitions */
47 /*
48  * This is not an accurate number. It is used in start.S. The frequency
49  * will be udpated later when get_bus_freq(0) is available.
50  */
51
52 #define COUNTER_FREQUENCY               25000000        /* 25MHz */
53
54 /* Serial Port */
55 #define CONFIG_PL011_CLOCK              (get_bus_freq(0) / 4)
56 #define CONFIG_SYS_SERIAL0              0x21c0000
57 #define CONFIG_SYS_SERIAL1              0x21d0000
58 #define CONFIG_SYS_SERIAL2              0x21e0000
59 #define CONFIG_SYS_SERIAL3              0x21f0000
60 /*below might needs to be removed*/
61 #define CONFIG_PL01x_PORTS              {(void *)CONFIG_SYS_SERIAL0, \
62                                         (void *)CONFIG_SYS_SERIAL1, \
63                                         (void *)CONFIG_SYS_SERIAL2, \
64                                         (void *)CONFIG_SYS_SERIAL3 }
65
66 /* MC firmware */
67 #define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH         0x20000
68 #define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET        0x00F00000
69 #define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH         0x20000
70 #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET        0x00F20000
71 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS        5000
72
73 /* Define phy_reset function to boot the MC based on mcinitcmd.
74  * This happens late enough to properly fixup u-boot env MAC addresses.
75  */
76 #define CONFIG_RESET_PHY_R
77
78 /*
79  * Carve out a DDR region which will not be used by u-boot/Linux
80  *
81  * It will be used by MC and Debug Server. The MC region must be
82  * 512MB aligned, so the min size to hide is 512MB.
83  */
84 #ifdef CONFIG_FSL_MC_ENET
85 #define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE    (256UL * 1024 * 1024)
86 #endif
87
88 /* I2C bus multiplexer */
89 #define I2C_MUX_PCA_ADDR_PRI            0x77 /* Primary Mux*/
90 #define I2C_MUX_CH_DEFAULT              0x8
91
92 /* RTC */
93 #define RTC
94 #define CONFIG_SYS_I2C_RTC_ADDR         0x51  /* Channel 3*/
95
96 /* EEPROM */
97 #define CONFIG_SYS_I2C_EEPROM_NXID
98 #define CONFIG_SYS_EEPROM_BUS_NUM               0
99
100 /* Qixis */
101 #define CONFIG_FSL_QIXIS
102 #define CONFIG_QIXIS_I2C_ACCESS
103 #define CONFIG_SYS_I2C_FPGA_ADDR                0x66
104
105 /* PCI */
106 #ifdef CONFIG_PCI
107 #define CONFIG_PCI_SCAN_SHOW
108 #endif
109
110 /* SATA */
111
112 #ifdef CONFIG_SCSI
113 #define CONFIG_SCSI_AHCI_PLAT
114 #define CONFIG_SYS_SATA1                AHCI_BASE_ADDR1
115 #define CONFIG_SYS_SATA2                AHCI_BASE_ADDR2
116 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     1
117 #define CONFIG_SYS_SCSI_MAX_LUN         1
118 #define CONFIG_SYS_SCSI_MAX_DEVICE      (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
119                                         CONFIG_SYS_SCSI_MAX_LUN)
120 #endif
121
122 /* USB */
123 #ifdef CONFIG_USB_HOST
124 #ifndef CONFIG_TARGET_LX2162AQDS
125 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
126 #endif
127 #endif
128
129 #define COUNTER_FREQUENCY_REAL          (get_board_sys_clk() / 4)
130
131 #define CONFIG_HWCONFIG
132 #define HWCONFIG_BUFFER_SIZE            128
133
134 /* Monitor Command Prompt */
135 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
136 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
137                                         sizeof(CONFIG_SYS_PROMPT) + 16)
138 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE /* Boot args buffer */
139 #define CONFIG_SYS_MAXARGS              64      /* max command args */
140
141 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
142
143 /* Initial environment variables */
144 #define XSPI_MC_INIT_CMD                                \
145         "sf probe 0:0 && "                              \
146         "sf read 0x80640000 0x640000 0x80000 && "       \
147         "sf read $fdt_addr_r 0xf00000 0x100000 && "     \
148         "env exists secureboot && "                     \
149         "esbc_validate 0x80640000 && "                  \
150         "esbc_validate 0x80680000; "                    \
151         "sf read 0x80a00000 0xa00000 0x300000 && "      \
152         "sf read 0x80e00000 0xe00000 0x100000; "        \
153         "fsl_mc start mc 0x80a00000 0x80e00000\0"
154
155 #define SD_MC_INIT_CMD                          \
156         "mmc read 0x80a00000 0x5000 0x1200;"    \
157         "mmc read 0x80e00000 0x7000 0x800;"     \
158         "mmc read $fdt_addr_r 0x7800 0x800;"    \
159         "env exists secureboot && "             \
160         "mmc read 0x80640000 0x3200 0x20 && "   \
161         "mmc read 0x80680000 0x3400 0x20 && "   \
162         "esbc_validate 0x80640000 && "          \
163         "esbc_validate 0x80680000 ;"            \
164         "fsl_mc start mc 0x80a00000 0x80e00000\0"
165
166 #define SD2_MC_INIT_CMD                         \
167         "mmc dev 1; mmc read 0x80a00000 0x5000 0x1200;" \
168         "mmc read 0x80e00000 0x7000 0x800;"     \
169         "mmc read $fdt_addr_r 0x7800 0x800;"    \
170         "env exists secureboot && "             \
171         "mmc read 0x80640000 0x3200 0x20 && "   \
172         "mmc read 0x80680000 0x3400 0x20 && "   \
173         "esbc_validate 0x80640000 && "          \
174         "esbc_validate 0x80680000 ;"            \
175         "fsl_mc start mc 0x80a00000 0x80e00000\0"
176
177 #define EXTRA_ENV_SETTINGS                      \
178         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
179         "ramdisk_addr=0x800000\0"               \
180         "ramdisk_size=0x2000000\0"              \
181         "fdt_high=0xa0000000\0"                 \
182         "initrd_high=0xffffffffffffffff\0"      \
183         "fdt_addr=0x64f00000\0"                 \
184         "kernel_start=0x1000000\0"              \
185         "kernelheader_start=0x600000\0"         \
186         "scriptaddr=0x80000000\0"               \
187         "scripthdraddr=0x80080000\0"            \
188         "fdtheader_addr_r=0x80100000\0"         \
189         "kernelheader_addr_r=0x80200000\0"      \
190         "kernel_addr_r=0x81000000\0"            \
191         "kernelheader_size=0x40000\0"           \
192         "fdt_addr_r=0x90000000\0"               \
193         "load_addr=0xa0000000\0"                \
194         "kernel_size=0x2800000\0"               \
195         "kernel_addr_sd=0x8000\0"               \
196         "kernelhdr_addr_sd=0x3000\0"            \
197         "kernel_size_sd=0x14000\0"              \
198         "kernelhdr_size_sd=0x20\0"              \
199         "console=ttyAMA0,38400n8\0"             \
200         BOOTENV                                 \
201         "mcmemsize=0x70000000\0"                \
202         XSPI_MC_INIT_CMD                                \
203         "scan_dev_for_boot_part="               \
204                 "part list ${devtype} ${devnum} devplist; "     \
205                 "env exists devplist || setenv devplist 1; "    \
206                 "for distro_bootpart in ${devplist}; do "       \
207                         "if fstype ${devtype} "                 \
208                                 "${devnum}:${distro_bootpart} " \
209                                 "bootfstype; then "             \
210                                 "run scan_dev_for_boot; "       \
211                         "fi; "                                  \
212                 "done\0"                                        \
213         "boot_a_script="                                        \
214                 "load ${devtype} ${devnum}:${distro_bootpart} " \
215                         "${scriptaddr} ${prefix}${script}; "    \
216                 "env exists secureboot && load ${devtype} "     \
217                         "${devnum}:${distro_bootpart} "         \
218                         "${scripthdraddr} ${prefix}${boot_script_hdr} " \
219                         "&& esbc_validate ${scripthdraddr};"    \
220                 "source ${scriptaddr}\0"
221
222 #define XSPI_NOR_BOOTCOMMAND                                            \
223                         "sf probe 0:0; "                                \
224                         "sf read 0x806c0000 0x6c0000 0x40000; "         \
225                         "env exists mcinitcmd && env exists secureboot" \
226                         " && esbc_validate 0x806c0000; "                \
227                         "sf read 0x80d00000 0xd00000 0x100000; "        \
228                         "env exists mcinitcmd && "                      \
229                         "fsl_mc lazyapply dpl 0x80d00000; "             \
230                         "run distro_bootcmd;run xspi_bootcmd; "         \
231                         "env exists secureboot && esbc_halt;"
232
233 #define SD_BOOTCOMMAND                                          \
234                 "env exists mcinitcmd && mmcinfo; "             \
235                 "mmc read 0x80d00000 0x6800 0x800; "            \
236                 "env exists mcinitcmd && env exists secureboot "        \
237                 " && mmc read 0x806C0000 0x3600 0x20 "          \
238                 "&& esbc_validate 0x806C0000;env exists mcinitcmd "     \
239                 "&& fsl_mc lazyapply dpl 0x80d00000;"           \
240                 "run distro_bootcmd;run sd_bootcmd;"            \
241                 "env exists secureboot && esbc_halt;"
242
243 #define SD2_BOOTCOMMAND                                         \
244                 "mmc dev 1; env exists mcinitcmd && mmcinfo; "  \
245                 "mmc read 0x80d00000 0x6800 0x800; "            \
246                 "env exists mcinitcmd && env exists secureboot "        \
247                 " && mmc read 0x806C0000 0x3600 0x20 "          \
248                 "&& esbc_validate 0x806C0000;env exists mcinitcmd "     \
249                 "&& fsl_mc lazyapply dpl 0x80d00000;"           \
250                 "run distro_bootcmd;run sd2_bootcmd;"           \
251                 "env exists secureboot && esbc_halt;"
252
253 #define BOOT_TARGET_DEVICES(func) \
254         func(USB, usb, 0) \
255         func(MMC, mmc, 0) \
256         func(MMC, mmc, 1) \
257         func(SCSI, scsi, 0) \
258         func(DHCP, dhcp, na)
259 #include <config_distro_bootcmd.h>
260
261 #endif /* __LX2_COMMON_H */