1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2018-2021 NXP
9 #include <asm/arch/stream_id_lsch3.h>
10 #include <asm/arch/config.h>
11 #include <asm/arch/soc.h>
13 #define CONFIG_FSL_MEMAC
15 #define CONFIG_SYS_FLASH_BASE 0x20000000
18 #define CONFIG_SYS_FSL_DDR_INTLV_256B /* force 256 byte interleaving */
19 #define CONFIG_VERY_BIG_RAM
20 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
21 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
22 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
23 #define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2
24 #define CONFIG_SYS_SDRAM_SIZE 0x200000000UL
25 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
26 #define CONFIG_MEM_INIT_VALUE 0xdeadbeef
27 #define SPD_EEPROM_ADDRESS1 0x51
28 #define SPD_EEPROM_ADDRESS2 0x52
29 #define SPD_EEPROM_ADDRESS3 0x53
30 #define SPD_EEPROM_ADDRESS4 0x54
31 #define SPD_EEPROM_ADDRESS5 0x55
32 #define SPD_EEPROM_ADDRESS6 0x56
33 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1
34 #define CONFIG_SYS_MONITOR_LEN (936 * 1024)
36 /* Miscellaneous configurable options */
39 #define CPU_RELEASE_ADDR secondary_boot_addr
41 /* Generic Timer Definitions */
43 * This is not an accurate number. It is used in start.S. The frequency
44 * will be udpated later when get_bus_freq(0) is available.
49 #define CONFIG_PL011_CLOCK (get_bus_freq(0) / 4)
50 #define CONFIG_SYS_SERIAL0 0x21c0000
51 #define CONFIG_SYS_SERIAL1 0x21d0000
52 #define CONFIG_SYS_SERIAL2 0x21e0000
53 #define CONFIG_SYS_SERIAL3 0x21f0000
54 /*below might needs to be removed*/
55 #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
56 (void *)CONFIG_SYS_SERIAL1, \
57 (void *)CONFIG_SYS_SERIAL2, \
58 (void *)CONFIG_SYS_SERIAL3 }
61 #define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000
62 #define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000
63 #define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000
64 #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000
65 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
68 * Carve out a DDR region which will not be used by u-boot/Linux
70 * It will be used by MC and Debug Server. The MC region must be
71 * 512MB aligned, so the min size to hide is 512MB.
73 #ifdef CONFIG_FSL_MC_ENET
74 #define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024)
77 /* I2C bus multiplexer */
78 #define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
79 #define I2C_MUX_CH_DEFAULT 0x8
83 #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
86 #define CONFIG_SYS_I2C_EEPROM_NXID
87 #define CONFIG_SYS_EEPROM_BUS_NUM 0
90 #define CONFIG_SYS_I2C_FPGA_ADDR 0x66
94 #define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4)
96 #define CONFIG_HWCONFIG
97 #define HWCONFIG_BUFFER_SIZE 128
99 /* Initial environment variables */
100 #define XSPI_MC_INIT_CMD \
102 "sf read 0x80640000 0x640000 0x80000 && " \
103 "sf read $fdt_addr_r 0xf00000 0x100000 && " \
104 "env exists secureboot && " \
105 "esbc_validate 0x80640000 && " \
106 "esbc_validate 0x80680000; " \
107 "sf read 0x80a00000 0xa00000 0x300000 && " \
108 "sf read 0x80e00000 0xe00000 0x100000; " \
109 "fsl_mc start mc 0x80a00000 0x80e00000\0"
111 #define SD_MC_INIT_CMD \
112 "mmc read 0x80a00000 0x5000 0x1200;" \
113 "mmc read 0x80e00000 0x7000 0x800;" \
114 "mmc read $fdt_addr_r 0x7800 0x800;" \
115 "env exists secureboot && " \
116 "mmc read 0x80640000 0x3200 0x20 && " \
117 "mmc read 0x80680000 0x3400 0x20 && " \
118 "esbc_validate 0x80640000 && " \
119 "esbc_validate 0x80680000 ;" \
120 "fsl_mc start mc 0x80a00000 0x80e00000\0"
122 #define SD2_MC_INIT_CMD \
123 "mmc dev 1; mmc read 0x80a00000 0x5000 0x1200;" \
124 "mmc read 0x80e00000 0x7000 0x800;" \
125 "mmc read $fdt_addr_r 0x7800 0x800;" \
126 "env exists secureboot && " \
127 "mmc read 0x80640000 0x3200 0x20 && " \
128 "mmc read 0x80680000 0x3400 0x20 && " \
129 "esbc_validate 0x80640000 && " \
130 "esbc_validate 0x80680000 ;" \
131 "fsl_mc start mc 0x80a00000 0x80e00000\0"
133 #define EXTRA_ENV_SETTINGS \
134 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
135 "ramdisk_addr=0x800000\0" \
136 "ramdisk_size=0x2000000\0" \
137 "fdt_high=0xa0000000\0" \
138 "initrd_high=0xffffffffffffffff\0" \
139 "kernel_start=0x1000000\0" \
140 "kernelheader_start=0x600000\0" \
141 "scriptaddr=0x80000000\0" \
142 "scripthdraddr=0x80080000\0" \
143 "fdtheader_addr_r=0x80100000\0" \
144 "kernelheader_addr_r=0x80200000\0" \
145 "kernel_addr_r=0x81000000\0" \
146 "kernelheader_size=0x40000\0" \
147 "fdt_addr_r=0x90000000\0" \
148 "load_addr=0xa0000000\0" \
149 "kernel_size=0x2800000\0" \
150 "kernel_addr_sd=0x8000\0" \
151 "kernelhdr_addr_sd=0x3000\0" \
152 "kernel_size_sd=0x14000\0" \
153 "kernelhdr_size_sd=0x20\0" \
154 "console=ttyAMA0,38400n8\0" \
156 "mcmemsize=0x70000000\0" \
158 "scan_dev_for_boot_part=" \
159 "part list ${devtype} ${devnum} devplist; " \
160 "env exists devplist || setenv devplist 1; " \
161 "for distro_bootpart in ${devplist}; do " \
162 "if fstype ${devtype} " \
163 "${devnum}:${distro_bootpart} " \
164 "bootfstype; then " \
165 "run scan_dev_for_boot; " \
169 "load ${devtype} ${devnum}:${distro_bootpart} " \
170 "${scriptaddr} ${prefix}${script}; " \
171 "env exists secureboot && load ${devtype} " \
172 "${devnum}:${distro_bootpart} " \
173 "${scripthdraddr} ${prefix}${boot_script_hdr} " \
174 "&& esbc_validate ${scripthdraddr};" \
175 "source ${scriptaddr}\0"
177 #define XSPI_NOR_BOOTCOMMAND \
179 "sf read 0x806c0000 0x6c0000 0x40000; " \
180 "env exists mcinitcmd && env exists secureboot" \
181 " && esbc_validate 0x806c0000; " \
182 "sf read 0x80d00000 0xd00000 0x100000; " \
183 "env exists mcinitcmd && " \
184 "fsl_mc lazyapply dpl 0x80d00000; " \
185 "run distro_bootcmd;run xspi_bootcmd; " \
186 "env exists secureboot && esbc_halt;"
188 #define SD_BOOTCOMMAND \
189 "env exists mcinitcmd && mmcinfo; " \
190 "mmc read 0x80d00000 0x6800 0x800; " \
191 "env exists mcinitcmd && env exists secureboot " \
192 " && mmc read 0x806C0000 0x3600 0x20 " \
193 "&& esbc_validate 0x806C0000;env exists mcinitcmd " \
194 "&& fsl_mc lazyapply dpl 0x80d00000;" \
195 "run distro_bootcmd;run sd_bootcmd;" \
196 "env exists secureboot && esbc_halt;"
198 #define SD2_BOOTCOMMAND \
199 "mmc dev 1; env exists mcinitcmd && mmcinfo; " \
200 "mmc read 0x80d00000 0x6800 0x800; " \
201 "env exists mcinitcmd && env exists secureboot " \
202 " && mmc read 0x806C0000 0x3600 0x20 " \
203 "&& esbc_validate 0x806C0000;env exists mcinitcmd " \
204 "&& fsl_mc lazyapply dpl 0x80d00000;" \
205 "run distro_bootcmd;run sd2_bootcmd;" \
206 "env exists secureboot && esbc_halt;"
208 #ifdef CONFIG_CMD_USB
209 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
211 #define BOOT_TARGET_DEVICES_USB(func)
215 #define BOOT_TARGET_DEVICES_MMC(func, instance) func(MMC, mmc, instance)
217 #define BOOT_TARGET_DEVICES_MMC(func)
221 #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
223 #define BOOT_TARGET_DEVICES_SCSI(func)
226 #ifdef CONFIG_CMD_DHCP
227 #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
229 #define BOOT_TARGET_DEVICES_DHCP(func)
232 #define BOOT_TARGET_DEVICES(func) \
233 BOOT_TARGET_DEVICES_USB(func) \
234 BOOT_TARGET_DEVICES_MMC(func, 0) \
235 BOOT_TARGET_DEVICES_MMC(func, 1) \
236 BOOT_TARGET_DEVICES_SCSI(func) \
237 BOOT_TARGET_DEVICES_DHCP(func)
238 #include <config_distro_bootcmd.h>
240 #endif /* __LX2_COMMON_H */