1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2018-2021 NXP
9 #include <asm/arch/stream_id_lsch3.h>
10 #include <asm/arch/config.h>
11 #include <asm/arch/soc.h>
13 #define CONFIG_SYS_FLASH_BASE 0x20000000
16 #define CONFIG_VERY_BIG_RAM
17 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
18 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
19 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
20 #define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2
21 #define CONFIG_SYS_SDRAM_SIZE 0x200000000UL
22 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
23 #define CONFIG_MEM_INIT_VALUE 0xdeadbeef
24 #define SPD_EEPROM_ADDRESS1 0x51
25 #define SPD_EEPROM_ADDRESS2 0x52
26 #define SPD_EEPROM_ADDRESS3 0x53
27 #define SPD_EEPROM_ADDRESS4 0x54
28 #define SPD_EEPROM_ADDRESS5 0x55
29 #define SPD_EEPROM_ADDRESS6 0x56
30 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1
31 #define CONFIG_SYS_MONITOR_LEN (936 * 1024)
33 /* Miscellaneous configurable options */
36 #define CPU_RELEASE_ADDR secondary_boot_addr
38 /* Generic Timer Definitions */
40 * This is not an accurate number. It is used in start.S. The frequency
41 * will be udpated later when get_bus_freq(0) is available.
46 #define CONFIG_PL011_CLOCK (get_bus_freq(0) / 4)
47 #define CONFIG_SYS_SERIAL0 0x21c0000
48 #define CONFIG_SYS_SERIAL1 0x21d0000
49 #define CONFIG_SYS_SERIAL2 0x21e0000
50 #define CONFIG_SYS_SERIAL3 0x21f0000
51 /*below might needs to be removed*/
52 #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
53 (void *)CONFIG_SYS_SERIAL1, \
54 (void *)CONFIG_SYS_SERIAL2, \
55 (void *)CONFIG_SYS_SERIAL3 }
58 #define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000
59 #define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000
60 #define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000
61 #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000
62 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
65 * Carve out a DDR region which will not be used by u-boot/Linux
67 * It will be used by MC and Debug Server. The MC region must be
68 * 512MB aligned, so the min size to hide is 512MB.
70 #ifdef CONFIG_FSL_MC_ENET
71 #define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024)
74 /* I2C bus multiplexer */
75 #define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
76 #define I2C_MUX_CH_DEFAULT 0x8
80 #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
83 #define CONFIG_SYS_I2C_EEPROM_NXID
84 #define CONFIG_SYS_EEPROM_BUS_NUM 0
87 #define CONFIG_SYS_I2C_FPGA_ADDR 0x66
91 #define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4)
93 #define CONFIG_HWCONFIG
94 #define HWCONFIG_BUFFER_SIZE 128
96 /* Initial environment variables */
97 #define XSPI_MC_INIT_CMD \
99 "sf read 0x80640000 0x640000 0x80000 && " \
100 "sf read $fdt_addr_r 0xf00000 0x100000 && " \
101 "env exists secureboot && " \
102 "esbc_validate 0x80640000 && " \
103 "esbc_validate 0x80680000; " \
104 "sf read 0x80a00000 0xa00000 0x300000 && " \
105 "sf read 0x80e00000 0xe00000 0x100000; " \
106 "fsl_mc start mc 0x80a00000 0x80e00000\0"
108 #define SD_MC_INIT_CMD \
109 "mmc read 0x80a00000 0x5000 0x1200;" \
110 "mmc read 0x80e00000 0x7000 0x800;" \
111 "mmc read $fdt_addr_r 0x7800 0x800;" \
112 "env exists secureboot && " \
113 "mmc read 0x80640000 0x3200 0x20 && " \
114 "mmc read 0x80680000 0x3400 0x20 && " \
115 "esbc_validate 0x80640000 && " \
116 "esbc_validate 0x80680000 ;" \
117 "fsl_mc start mc 0x80a00000 0x80e00000\0"
119 #define SD2_MC_INIT_CMD \
120 "mmc dev 1; mmc read 0x80a00000 0x5000 0x1200;" \
121 "mmc read 0x80e00000 0x7000 0x800;" \
122 "mmc read $fdt_addr_r 0x7800 0x800;" \
123 "env exists secureboot && " \
124 "mmc read 0x80640000 0x3200 0x20 && " \
125 "mmc read 0x80680000 0x3400 0x20 && " \
126 "esbc_validate 0x80640000 && " \
127 "esbc_validate 0x80680000 ;" \
128 "fsl_mc start mc 0x80a00000 0x80e00000\0"
130 #define EXTRA_ENV_SETTINGS \
131 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
132 "ramdisk_addr=0x800000\0" \
133 "ramdisk_size=0x2000000\0" \
134 "fdt_high=0xa0000000\0" \
135 "initrd_high=0xffffffffffffffff\0" \
136 "kernel_start=0x1000000\0" \
137 "kernelheader_start=0x600000\0" \
138 "scriptaddr=0x80000000\0" \
139 "scripthdraddr=0x80080000\0" \
140 "fdtheader_addr_r=0x80100000\0" \
141 "kernelheader_addr_r=0x80200000\0" \
142 "kernel_addr_r=0x81000000\0" \
143 "kernelheader_size=0x40000\0" \
144 "fdt_addr_r=0x90000000\0" \
145 "load_addr=0xa0000000\0" \
146 "kernel_size=0x2800000\0" \
147 "kernel_addr_sd=0x8000\0" \
148 "kernelhdr_addr_sd=0x3000\0" \
149 "kernel_size_sd=0x14000\0" \
150 "kernelhdr_size_sd=0x20\0" \
151 "console=ttyAMA0,38400n8\0" \
153 "mcmemsize=0x70000000\0" \
155 "scan_dev_for_boot_part=" \
156 "part list ${devtype} ${devnum} devplist; " \
157 "env exists devplist || setenv devplist 1; " \
158 "for distro_bootpart in ${devplist}; do " \
159 "if fstype ${devtype} " \
160 "${devnum}:${distro_bootpart} " \
161 "bootfstype; then " \
162 "run scan_dev_for_boot; " \
166 "load ${devtype} ${devnum}:${distro_bootpart} " \
167 "${scriptaddr} ${prefix}${script}; " \
168 "env exists secureboot && load ${devtype} " \
169 "${devnum}:${distro_bootpart} " \
170 "${scripthdraddr} ${prefix}${boot_script_hdr} " \
171 "&& esbc_validate ${scripthdraddr};" \
172 "source ${scriptaddr}\0"
174 #define XSPI_NOR_BOOTCOMMAND \
176 "sf read 0x806c0000 0x6c0000 0x40000; " \
177 "env exists mcinitcmd && env exists secureboot" \
178 " && esbc_validate 0x806c0000; " \
179 "sf read 0x80d00000 0xd00000 0x100000; " \
180 "env exists mcinitcmd && " \
181 "fsl_mc lazyapply dpl 0x80d00000; " \
182 "run distro_bootcmd;run xspi_bootcmd; " \
183 "env exists secureboot && esbc_halt;"
185 #define SD_BOOTCOMMAND \
186 "env exists mcinitcmd && mmcinfo; " \
187 "mmc read 0x80d00000 0x6800 0x800; " \
188 "env exists mcinitcmd && env exists secureboot " \
189 " && mmc read 0x806C0000 0x3600 0x20 " \
190 "&& esbc_validate 0x806C0000;env exists mcinitcmd " \
191 "&& fsl_mc lazyapply dpl 0x80d00000;" \
192 "run distro_bootcmd;run sd_bootcmd;" \
193 "env exists secureboot && esbc_halt;"
195 #define SD2_BOOTCOMMAND \
196 "mmc dev 1; env exists mcinitcmd && mmcinfo; " \
197 "mmc read 0x80d00000 0x6800 0x800; " \
198 "env exists mcinitcmd && env exists secureboot " \
199 " && mmc read 0x806C0000 0x3600 0x20 " \
200 "&& esbc_validate 0x806C0000;env exists mcinitcmd " \
201 "&& fsl_mc lazyapply dpl 0x80d00000;" \
202 "run distro_bootcmd;run sd2_bootcmd;" \
203 "env exists secureboot && esbc_halt;"
205 #ifdef CONFIG_CMD_USB
206 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
208 #define BOOT_TARGET_DEVICES_USB(func)
212 #define BOOT_TARGET_DEVICES_MMC(func, instance) func(MMC, mmc, instance)
214 #define BOOT_TARGET_DEVICES_MMC(func)
218 #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
220 #define BOOT_TARGET_DEVICES_SCSI(func)
223 #ifdef CONFIG_CMD_DHCP
224 #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
226 #define BOOT_TARGET_DEVICES_DHCP(func)
229 #define BOOT_TARGET_DEVICES(func) \
230 BOOT_TARGET_DEVICES_USB(func) \
231 BOOT_TARGET_DEVICES_MMC(func, 0) \
232 BOOT_TARGET_DEVICES_MMC(func, 1) \
233 BOOT_TARGET_DEVICES_SCSI(func) \
234 BOOT_TARGET_DEVICES_DHCP(func)
235 #include <config_distro_bootcmd.h>
237 #endif /* __LX2_COMMON_H */